Gate-controlled lateral PNP BJT: characteristics, modeling and circuit applications

Yan, Z.X.; Deen, M. Jamal; Malhi, D.S.

doi:10.1109/16.555443

Cited by 54 publications

(11 citation statements)

References 8 publications

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“…This phenomenon is very similar to the carrier barrier lowing effect that occurs in the lateral bipolar transistor. 29 The increased injection rate caused by the positively increased gate voltage Vg may lead to the enhanced emission power observed in the three-terminal device, gate-diode. The other reason why the gated-diode has obviously enhanced emission intensity is that the accumulation of electrons at the surface of the n-substrate confines the photon emission to the surface of the device, thus reducing the optical absorption by the silicon material itself.…”

Section: Discussionmentioning

confidence: 99%

A novel way to improve the quantum efficiency of silicon light-emitting diode in a standard silicon complementary metal–oxide–semiconductor technology

Xu¹,

Li²

2013

Journal of Applied Physics

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Silicon diode at avalanche breakdown has visible light emission in the depletion region. It is believed that this optical radiation comes from the kinetic energy loss of carriers generated by impact ionization colliding with immobile charge centers in the avalanche region. A theoretical model is presented to show the correlation of the hot carrier effect with the related photonic emission in high field. Meanwhile, a PMOSFET-like silicon light source device fabricated completely in the standard silicon CMOS process technology is measured to demonstrate that avalanching current is linearly proportional to optical emission power whether this light source acts as a two-terminal device (i.e., diode, the “p+ Source/Drain to n-Substrate junction” with floating the gate) or acts as a three-terminal device (i.e., gate-diode, the “p+ Source/Drain to n-Substrate junction” in the course of varying the gate voltage). Such linearity implies that control of the increasing current is a significant way to enhance the quantum efficiency of this light source device no matter what the physical structure (i.e., two terminals or three terminals) of this device is. For the first time, it has been discovered that, at the same avalanching current, the optical output power in gate-diode structure is higher than the optical output power in diode structure. In other words, for this PMOSFET-like device, the three-terminal operating mode is more efficient than the two-terminal operating mode.

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Section: Discussionmentioning

confidence: 99%

A novel way to improve the quantum efficiency of silicon light-emitting diode in a standard silicon complementary metal–oxide–semiconductor technology

Xu¹,

Li²

2013

Journal of Applied Physics

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“…Under forward source-body bias, high source-drain bias and for very short-channel lengths, lateral bipolar action occurs beneath the channel region [9]. Rofail and Yeo [10] have explained the need to model this secondary current component and have modeled the lateral bipolar current using a modified transport equation.…”

Section: The Lateral Bipolar Current Modelmentioning

confidence: 99%

“…Hybrid-mode devices have received much attention in the past due to their high-performance and their availability without any additional processing steps [1]- [5]. In recent years, they have received renewed interest and have been frequently employed in CMOS/BiCMOS digital circuits for low-voltage applications [6]- [8], as well as in analog circuits [9]. An analytical model for deep submicrometer pMOSFET's operating in a hybrid-mode environment has been reported [10].…”

Section: Introductionmentioning

confidence: 99%

A temperature-dependent DC model for quarter-micron LDD pMOSFET's operating in a Bi-MOS structure

Chew¹,

Rofail

Yeo

1999

IEEE Trans. Electron Devices

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A temperature-dependent analytical model for deep submicrometer LDD p-channel devices operating in a Bi-MOS structure is reported for the first time. This model is based on experimental data obtained from 0.25-m process wafers with a wide range of technologies (0.25-1.0 m). The measurements have been performed within the temperature range 223-398 K (050 C to +125 C). The model accounts for the effects of independently biasing the source, drain, gate and body potentials, scaling, and the influence of temperature on the threshold voltage and the device currents. The effect of temperature on the device transconductance and the output conductance have also been examined. The results revealed that close agreement between

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“…In Radio Frequency (RF) applications, BJTs are superior to field effect ones [6], but in terms of the number of in-chip transistors, MOSFET transistors are superior. In BJTs, the current gain (β) is one of the most important parameters [7], which is determined during the design and fabrication processes and the manufacturing technology, which may change with factors such as temperature and affect the circuit operation. There is also a great desire to increase or control this parameter using different techniques [8].…”

Section: Introductionmentioning

confidence: 99%

Design and Simulation of a Novel Hetero-junction Bipolar Transistor with Gate-Controlled Current Gain

Mehrabani

Fattah

Rahimi

2023

IJE

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A new structure for SiGe Hetero-junction Bipolar transistor (HBT) is designed and simulated using Silvaco simulator. The considered extra terminal gives the ability to control the transistor's current gain. By applying voltage to the gate terminal, the base effective width would be controlled. Decrement of the Base width yields to the carrier recombination rate reduction, let the emitted electrons to have higher chance to reach the collector. Considering extra terminal have two approaches. One is to improve the current gain of the transistor by applying a constant voltage to the gate and the other is to modify the characteristics of the transistor in such a way that the current gain became optimized. The current gain of the transistor without any gate voltage is about 50V, which increases to 750 for high and 50,000 for low collector currents with the gate voltage variation consideration. In addition, our final proposed gatecontrolled HBT with a large gate over the base and collector has the breakdown voltage of 8V and the cut-off frequency of about 11 GHz. The maximum FoM of 1200 is achieved using the proposed structure.

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Gate-controlled lateral PNP BJT: characteristics, modeling and circuit applications

Cited by 54 publications

References 8 publications

A novel way to improve the quantum efficiency of silicon light-emitting diode in a standard silicon complementary metal–oxide–semiconductor technology

A novel way to improve the quantum efficiency of silicon light-emitting diode in a standard silicon complementary metal–oxide–semiconductor technology

A temperature-dependent DC model for quarter-micron LDD pMOSFET's operating in a Bi-MOS structure

Design and Simulation of a Novel Hetero-junction Bipolar Transistor with Gate-Controlled Current Gain

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