Gate‐all‐around nanowire vertical tunneling FETs by ferroelectric internal voltage amplification

Abstract

This work illustrates the most effective way of utilizing the ferroelectricity for tunneling field-effect transistors (TFETs). The ferroelectric (Hf0.5Zr0.5O2) in shunt with gate-dielectric is utilized as an optimized metal–ferroelectric–semiconductor (OMFS) option to improve the internal voltage (V int ) for ample utilization of polarization and electric fields of Hf0.5Zr0.5O2 across the tunneling region. The modeling of V int signifies 0.15–1.2 nm reduction in tunneling length (λ) than the nominal metal–ferroelectric–insulator–semiconductor (MFIS) option. Furthermore, the TFET geometry with the scaled-epitaxy region as vertical TFET (VTFET), strained Si0.6Ge0.4 as source, and gate-all-around nanowire options are used as an added advantage for further enhancement of TFET’s performance. As a result, the proposed design (OMFS-VTFET) achieves superior DC and RF performances than the MFIS option of TFET. The figure of merits in terms of DC characteristics in the proposed and optimized structure are of improved on-current (=0.23 mA μm−1), high on-to-off current ratio (=1011), steep subthreshold swing (=33.36 mV dec−1), and superior unity gain cut-off frequency (≥300 GHz). The design is revealed as energy-efficient with significant reduction of energy-efficiency in both logic and memory applications.

DC and AC characteristics of Si/SiGe based vertically stacked complementary-tunneling FETs

“…Therefore, high operating f needs advanced TFET structures (as stated before). The well identified advanced tunneling options are of through structural (vertical or line-tunneling mechanism based, namely vertical-TFETs [25], area TFETs [12], and so on) and material engineering (direct bandgap semiconductors [26], 2D materials [27], high-κ and ferroelectric as dielectrics [28], and so on) to achieve high current drivability, implies high operating frequency regime. These advanced tunneling boosters are helpful for intrinsic device performance as a conductance booster.…”

Combined effects of the deposition temperature and metal electrodes on ferroelectric properties of atomic-layer-deposited Hf0.5Zr0.5O2 films

“…This study examines the phase evolution and ferroelectric properties of the Hf 0.5 Zr 0.5 O 2 (HZO) films as a function of the T dep of ALD using two different metal electrodes, namely, TiN and Mo electrodes. Although other parameters, such as film thickness [6,19,20] and annealing temperature [6,9,21], also have significant effects on the ferroelectric properties of the HZO films, they were fixed in this experiment. Effects of T dep on the polymorphism of the HZO film differed depending on the type of the electrode materials.…”

A high performance trench gate tunneling field effect transistor based on quasi-broken gap energy band alignment heterojunction

“…To solve this problem, material engineering is applied to further improve the band to band tunneling rate. Ferroelectric materials [14,15] and heterojunctions such as Si/SiGe heterojunction [16][17][18], SiGeSn/GeSn heterojunction [19], III-V heterojunction [9,[20][21][22][23][24][25] and 2D material TFET [26,27] are applied. By selecting appropriate materials to form Original content from this work may be used under the terms of the Creative Commons Attribution 4.0 licence.…”