GaAs IC’s fabricated by electron beam lithography

Krumm, C.F.; Ozdemir, F. S.; Greiling, P.T.

doi:10.1116/1.570341

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1986

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“…Finally, using a single layer of PMMA, 0.2 ~m gate GaAs MESFET's with fv = 45 GHz have been fabricated (29). E-beam lithography has also been used to fabricate SSI (small scale integration) GaAs integrated circuits with 0.5 ~m gates (30,31).…”

Section: Metalmentioning

confidence: 99%

A Review of GaAs MESFET Gate Electrode Fabrication Technologies

Weitzel

Doane

1986

J. Electrochem. Soc.

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This review is designed to give an overview of the processes that have been used to define gate electrodes for GaAs MESFET's. This is an important topic, because the size and structure of the MESFET gate basically determines the performance of the transistor, which in turn determines the performance of GaAs circuits. Therefore, considerable effort has been expended in developing a wide variety of techniques. This review covers some of these techniques: lift-off using a single layer of positive photoresist, lift-off using multilayer photoresist structures, deep UV and E-beam lithography, selfaligned processes, and some nonconventional techniques.

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Section: Metalmentioning

confidence: 99%