Fundamental Understanding and Control of Device-to-Device Variation in Deeply Scaled Ferroelectric FETs

Ni, Kai; Chakraborty, Wriddhi; Smith, J. A.; Grisafe, Benjamin; Datta, Suman

doi:10.23919/vlsit.2019.8776497

Cited by 64 publications

(45 citation statements)

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“…Compared to PCM-based neuron that requires additional digital circuitry like a latch and a NOR logic gate (Tuma et al, 2016), our FeFET-based neuron dissipates 40x lower power and occupies at least 2.5x lower area in terms of feature size F. Compared to insulator-to-metel phase-transition vanadium dioxide (VO 2 )based neuron (Jerry et al, 2017), FeFET-based neuron dissipates 300x lower power. The intrinsic ferroelectric polarization switching mechanism being a stochastic process (Mulaosmanovic et al, 2018b, Mulaosmanovic et al, 2018cDutta et al, 2019a;Ni et al, 2019a), the FeFET-based spiking neuron exhibits stochastic firing that maybe useful for building stochastic neural networks like neural sampling machine with novel properties like inherent weight normalization (Detorakis et al, 2019), for applications like modeling uncertainties in neural networks (Gal and Ghahramani, 2016) and for probabilistic inferencing (Pecevski et al, 2011). One key limitation of FeFET-based neuron compared to generalized neuron model utilized in neuroscience and CMOS-based circuits is that the membrane potential is represented by the intrinsic ferroelectric polarization state variable and the associated stochasticity arises directly from the ferroelectric domain nucleation process.…”

Section: Discussionmentioning

confidence: 99%

“…Figure 2C shows the measured conductance modulation as a function of the number of applied pulses over multiple cycles. The cycle-to-cycle variation arises from the nucleation dominated ferroelectric polarization switching in FeFET which at the domain level is known to be a stochastic process ( Mulaosmanovic et al, 2018b ; Dutta et al, 2019a ; Ni et al, 2019a ). Once G DS exceeds a threshold, the drain current (I D ) increases and the FeFET is said to “ fire .” Once in the low-V T state, a negative voltage needs to be applied across the gate and drain/source in order to reset the FeFET to high-V T state.…”

Section: Methodsmentioning

confidence: 99%

“…Since the typical grain size in 10 nm HfO 2 is around 10-15 nm, it can be estimated that there will be around 1000 domains for a 500 nm × 500 nm FeFET. This also results in cycle-to-cycle (as well as device-to-device) variation, since the stochastic domain switching contribution from individual domains becomes more pronounced (Ni et al, 2019a). The inherent stochasticity results in a variation of the conductance states measured over multiple cycles for each voltage applied as shown in Figure 4C.…”

Section: Fefet-based Analog Synapsementioning

confidence: 99%

“…Figure 4E shows the cumulative distribution of the G DS states corresponding to potentiation pulse scheme obtained over multiple cycles. This indicates that while FeFETs are a promising candidate for non-volatile analog synapse, the number of available non-volatile states drastically reduce at the scaled node (Dutta et al, 2019a;Ni et al, 2019a). The implications of such a reduced bit-precision on learning algorithms are discussed next.…”

Section: Fefet-based Analog Synapsementioning

confidence: 99%

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Supervised Learning in All FeFET-Based Spiking Neural Network: Opportunities and Challenges

et al. 2020

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The two possible pathways toward artificial intelligence (AI)-(i) neuroscience-oriented neuromorphic computing [like spiking neural network (SNN)] and (ii) computer science driven machine learning (like deep learning) differ widely in their fundamental formalism and coding schemes (Pei et al., 2019). Deviating from traditional deep learning approach of relying on neuronal models with static nonlinearities, SNNs attempt to capture brainlike features like computation using spikes. This holds the promise of improving the energy efficiency of the computing platforms. In order to achieve a much higher areal and energy efficiency compared to today's hardware implementation of SNN, we need to go beyond the traditional route of relying on CMOS-based digital or mixed-signal neuronal circuits and segregation of computation and memory under the von Neumann architecture. Recently, ferroelectric field-effect transistors (FeFETs) are being explored as a promising alternative for building neuromorphic hardware by utilizing their nonvolatile nature and rich polarization switching dynamics. In this work, we propose an all FeFET-based SNN hardware that allows low-power spike-based information processing and co-localized memory and computing (a.k.a. in-memory computing). We experimentally demonstrate the essential neuronal and synaptic dynamics in a 28 nm high-K metal gate FeFET technology. Furthermore, drawing inspiration from the traditional machine learning approach of optimizing a cost function to adjust the synaptic weights, we implement a surrogate gradient (SG) learning algorithm on our SNN platform that allows us to perform supervised learning on MNIST dataset. As such, we provide a pathway toward building energy-efficient neuromorphic hardware that can support traditional machine learning algorithms. Finally, we undertake synergistic device-algorithm co-design by accounting for the impacts of device-level variation (stochasticity) and limited bit precision of on-chip synaptic weights (available analog states) on the classification accuracy.

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Section: Discussionmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%

Section: Fefet-based Analog Synapsementioning

confidence: 99%

Section: Fefet-based Analog Synapsementioning

confidence: 99%

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Supervised Learning in All FeFET-Based Spiking Neural Network: Opportunities and Challenges

et al. 2020

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“…8(a) presents the experimental data of device-to-device V th variation among 40 FerroFETs and the maximum variation in V th is 30%. More detailed experimental data are shown in [33]. Like other algorithms, we note that increasing variations will increase the error in computation.…”

Section: Design Space Explorationmentioning

confidence: 90%

A FerroFET-Based In-Memory Processor for Solving Distributed and Iterative Optimizations via Least-Squares Method

Yoon

Khan

Datta

et al. 2019

IEEE J. Explor. Solid-State Comput. Devices Circuits

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In recent years, several designs that use in-memory processing to accelerate machinelearning inference problems have been proposed. Such designs are also a perfect fit for discrete, dynamic, and distributed systems that can solve large-dimensional optimization problems using iterative algorithms. For in-memory computations, ferroelectric field-effect transistors (FerroFETs) owing to their compact area and distinguishable multiple states offer promising possibilities. We present a distributed architecture that uses FerroFET memory and implements in-memory processing to solve a template problem of least squares minimization. Through this architecture, we demonstrate an improvement of 21× in energy efficiency and 3× in compute time compared to a static random access memory (SRAM)-based processing-inmemory (PIM) architecture. INDEX TERMS Distributed computing, emerging, ferroelectric field-effect transistors (FerroFETs), hardware, in-memory processing, least square, optimization, post-CMOS.

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A Review of Artificial Spiking Neuron Devices for Neural Processing and Sensing

Han

Yun

Lee

et al. 2022

Adv Funct Materials

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A spiking neural network (SNN) inspired by the structure and principles of the human brain can significantly enhance the energy efficiency of artificial intelligence computing by overcoming the bottlenecks of the conventional von Neumann architecture with its massive parallelism and spike transmissions. The construction of artificial neurons is important for the hardware implementation of an SNN, which generates spike signals when enough synaptic signals are gathered. Because circuit‐level artificial neurons with comparator and reset circuits require considerable hardware area, intensive efforts are devoted in recent years for building artificial neurons at the device level for better area efficiency. Furthermore, artificial sensory neuron devices, which perform neural processing and sensing concurrently, have recently been developed in order to reduce the hardware cost and energy consumption of traditional sensory systems through in‐sensor computing. This review article surveys and benchmarks the recent progress of artificial neuron devices for neural processing and sensing. First, various artificial neuron devices are summarized, including single‐transistor neurons (1T‐neurons), memristor neurons, phase‐change neurons, magnetic neurons, and ferroelectric neurons. Next, cointegration technologies with artificial synaptic devices and artificial sensory neurons for in‐sensor computing are introduced. Finally, the challenges and prospects for developing artificial neuron devices are discussed.

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Fundamental Understanding and Control of Device-to-Device Variation in Deeply Scaled Ferroelectric FETs

Cited by 64 publications

References 0 publications

Supervised Learning in All FeFET-Based Spiking Neural Network: Opportunities and Challenges

Supervised Learning in All FeFET-Based Spiking Neural Network: Opportunities and Challenges

A FerroFET-Based In-Memory Processor for Solving Distributed and Iterative Optimizations via Least-Squares Method

A Review of Artificial Spiking Neuron Devices for Neural Processing and Sensing

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