Functional test generation using design and property decomposition techniques

Abstract

Functional verification of microprocessors is one of the most complex and expensive tasks in the current system-on-chip design methodology. Simulation using functional test vectors is the most widely used form of processor validation. A significant bottleneck in the validation of such systems is the lack of automated techniques for directed test generation. While existing model checking-based approaches have proposed several promising ideas for automated test generation, many challenges remain in applying them to industrial microprocessors. The time and resources required for test generation using existing model checking-based techniques can be prohibitively large. This article presents an efficient test generation technique using decompositional model checking. The contribution of the article is the development of both property and design decomposition procedures for efficient test generation of pipelined processors. Our experimental results using a multi-issue MIPS processor and an industrial processor based on Power Architecture TM Technology demonstrate several orders-of-magnitude reduction in validation effort by drastically reducing both test generation time and test program length. ACM Reference Format:Koo, H-M. and Mishra, P. 2009. Functional test generation using design and property decomposition techniques.

Generating test programs to cover pipeline interactions

“…Apart from automation of the entire process, our key contribution is that we generate the entire test suite through one exploration of the global state space. This is in contrast to approaches like [6], which query an external model checker millions of times. Our formalism models various micro-architectural features for test program generation purposes.…”

“…Geist et al [5] and Koo et al [6] have used model checkers to generate test programs for processor pipelines. The aim is to achieve a coverage of the state space by covering enough temporal properties.…”

“…When we construct/explore the state space, we use the same test program to cover both t1 and t2. This reduces the test-suite size by more than two orders of magnitude compared to existing works [6].…”

“…Such a global transition may involve several pipeline resources being acquired or released by multiple in-flight instructions. Existing research on coveragedriven test generation for embedded processor pipelines [5,6] take a restricted view of pipeline interactions -they typically enumerate and cover interactions among k resources for some small value of k (say 1 ≤ k ≤ 3). Clearly, we cannot artificially restrict the number of participating resources in a global transition to be a small number.…”

An Abstraction Technique for Testing Decomposable Systems by Model Checking

“…The approach presented here can be viewed in the context of those abstraction techniques for test generation that, following the "divide and conquer" principle, are based on system [2,3] or property [16] decomposition. Since model checkers suffer exponentially from the size of the system, decomposition brings an exponential gain and allows to test large systems.…”