2014
DOI: 10.1109/les.2014.2327114
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Function-Level Processor (FLP): A High Performance, Minimal Bandwidth, Low Power Architecture for Market-Oriented MPSoCs

Abstract: This letter introduces function-level processors (FLPs) to fill the flexibility/efficiency gap between instruction-level processors (ILPs) and hardware accelerators (HWACCs). Compared to an ILP, an FLP has a coarser programmability at function-level constructed out of configurable function blocks (FBs) implementing market-oriented functions. FBs are connected via a MUX-based programmable interconnect, tuned for envisioned application flows, for realizing flexible macro pipelines. We demonstrate FLP benefits wi… Show more

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Cited by 10 publications
(4 citation statements)
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“…Domain-specific designs provide the capability of adapting the architectures to set of applications to achieve orders of magnitude improvement in power and performance efficiency over general purpose designs [99,15]. For instance Q100 [121] is an example of domain-specific accelerators.…”
Section: Trend Toward Integration Of Many Accs On a Chipmentioning
confidence: 99%
See 3 more Smart Citations
“…Domain-specific designs provide the capability of adapting the architectures to set of applications to achieve orders of magnitude improvement in power and performance efficiency over general purpose designs [99,15]. For instance Q100 [121] is an example of domain-specific accelerators.…”
Section: Trend Toward Integration Of Many Accs On a Chipmentioning
confidence: 99%
“…Function Level Processor (FLP) [99] is another example of domain-specific ACCs that targets streaming applications. FLP boosts performance and power efficiency by customizing the frequently used functions in a target domain and allows data path optimization per function block.…”
Section: Trend Toward Integration Of Many Accs On a Chipmentioning
confidence: 99%
See 2 more Smart Citations