Fully Pipelined Low-Cost and High-Quality Color Demosaicking VLSI Design for Real-Time Video Applications

Abstract

 Abstract-This paper presents a fully pipelined color demosaicking design. To improve the quality of reconstructed images, a linear deviation compensation scheme was created to increase the correlation between the interpolated and neighboring pixels. Furthermore, immediately interpolated green color pixels are first to be used in hardware-oriented color demosaicking algorithms, which efficiently promoted the quality of the reconstructed image. A boundary detector and boundary mirror machine were added to improve the quality of pixels located in boundaries. In addition, a hardware sharing technique was used to reduce the hardware costs of three interpolators. The VLSI architecture in this work contains only 4.97 K gate counts and the core area is 60,229 um 2 synthesized by using 0.18-um CMOS process. The operating frequency of this work is 200 MHz by consuming 4.76 mW. Compared with the previous lowcomplexity designs, this work has the benefits in terms of low cost, low power consumption, and high performance.

Chroma 422 subsampling for Bayer pattern in H.264 video coding

“…To store CFA video in the memory, it is more efficient to employ H.264 video coding to explore inter-frame redundancy. Traditionally, the CFA is first demosaicked [1,2] into full RGB, which is then converted into YCbCr for H.264 video coding. Chen et al [3] proposed adjusted chroma-subsampling methods of the YCbCr 420 and 422 for H.264 to encode.…”