Fully Integrated High-Q Switched Capacitor Bandpass Filter with Center Frequency and Bandwidth Tuning

Oualkadi, Ahmed El; Kaamouchi, M. El; Paillot, Jean‐Marie; Vanhoenacker‐Janvier, Danielle; Flandre, Denis

doi:10.1109/rfic.2007.380974

Cited by 39 publications

(43 citation statements)

References 10 publications

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“…In table I the design is compared with two other on-chip filters, one using Q-enhancement [3] and the other an 8-path filter [7], clearly illustrating benefits in tuning-range, linearity and noise. In [7] the achieved Q is increased significantly by increasing source resistance without providing matching and also increasing the number of paths to 8. Inserting a resistor deteriorates the NF significantly.…”

Section: Measurement Results and Comparisonmentioning

confidence: 99%

“…In Fig. 2b, R can be considered as source impedance, but it can also serve as an "auxiliary resistance" to increase Q as in [7]. However, adding resistance results in noise degradation.…”

Section: N-path Filtermentioning

confidence: 99%

“…While the concept of passive N-path filters and commutating networks is known for a long time and has been used for low frequencies [4], the concept seems to be somewhat forgotten. Recently, the concept was applied to high frequencies [7] where an 8-path filter with on-chip clocking was realized in CMOS.…”

Section: Introductionmentioning

confidence: 99%

“…Compared to [7], the differential architecture suppresses selectivity around even harmonics of the mixing frequency. Moreover, input matching is provided by employing a wide-band RF transformer with termination resistor.…”

Section: Introductionmentioning

confidence: 99%

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A differential 4-path highly linear widely tunable on-chip band-pass filter

Ghaffari

Klumperink

Nauta

2010

2010 IEEE Radio Frequency Integrated Circuits Symposium

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-A passive switched capacitor RF bandpass filter with clock controlled center frequency is realized in 65nm CMOS. An off-chip transformer which acts as a balun, improves filter-Q and realizes impedance matching. The differential architecture reduces clock-leakage and suppresses selectivity around even harmonics of the clock. The filter has a constant -3dB bandwidth of 35MHz and can be tuned from 100MHz up to 1GHz. IIP3 is better than 19dBm, P 1dB =2dBm and NF<5.5dB at P diss =2mW to 16mW.Index Terms -N-path filters, commutated capacitor, CMOS bandpass filter, inductorless, cognitive radio, software-defined radio.

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Section: Measurement Results and Comparisonmentioning

confidence: 99%

“…In Fig. 2b, R can be considered as source impedance, but it can also serve as an "auxiliary resistance" to increase Q as in [7]. However, adding resistance results in noise degradation.…”

Section: N-path Filtermentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A differential 4-path highly linear widely tunable on-chip band-pass filter

Ghaffari

Klumperink

Nauta

2010

2010 IEEE Radio Frequency Integrated Circuits Symposium

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“…These two main issues reduced the attention of researchers for N-path filters. The substantial improvement in the speed and the matching properties of CMOS technology renewed a great interest into N-path filters [95,96,97,98,99,100,101,102,103,104,105]. Because the main constituents of N-path filters are switches and capacitors, CMOS technology is the best candidate for the realization of this type of filters.…”

Section: N-path Filtersmentioning

confidence: 99%

Active N-path Filters: Theory and Design

Darvishi¹

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Tunable selective receiver front end with impedance transformation filtering

Qazi

Duong

Dźbrowski

2015

Circuit Theory & Apps

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A highly selective impedance transformation filtering technique suitable for tunable selective RF receivers is proposed in this paper. To achieve blocker rejection comparable to SAW filters, we use a two stage architecture based on a low noise trans-conductance amplifier (LNTA). The filter rejection is captured by a linear periodically varying (LPV) model that includes band limitation by the LNTA output impedance and the related parasitic capacitances of the impedance transformation circuit. This model is also used to estimate "back folding" by interferers placed at harmonic frequencies. Discussed is also the effect of thermal noise folding and phase noise on the circuit noise figure. As a proof of concept a chip design of a tunable RF front-end using 65 nm CMOS technology is presented. In measurements the circuit achieves blocker rejection competitive to SAW filters with noise figure 3.25.2 dB, out of band IIP3 > +17 dBm and blocker P1dB > +5 dBm over frequency range of 0.5-3 GHz.

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Fully Integrated High-Q Switched Capacitor Bandpass Filter with Center Frequency and Bandwidth Tuning

Cited by 39 publications

References 10 publications

A differential 4-path highly linear widely tunable on-chip band-pass filter

A differential 4-path highly linear widely tunable on-chip band-pass filter

Active N-path Filters: Theory and Design

Tunable selective receiver front end with impedance transformation filtering

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