Fully depleted and backside biased monolithic CMOS image sensor

Abstract

We are presenting a novel concept for a fully depleted, monolithic, pinned photodiode CMOS image sensor using reverse substrate bias. The principle of operation allows the manufacture of backside illuminated CMOS sensors with active thickness in excess of 100 µm. This helps increase the QE at near-IR and soft X-ray wavelengths, while preserving the excellent characteristics associated with the pinned photodiode sensitive elements. Such sensors are relevant to a wide range of applications, including scientific imaging, astronomy, Earth observation and surveillance.A prototype device with 10 µm and 5.4 µm pixels using this concept has been designed and is being manufactured on a 0.18 µm CMOS image sensor process. Only one additional implantation step has been introduced to the normal manufacturing flow to make this device. The paper discusses the design of the sensor and the challenges that had to be overcome to realise it in practice, and in particular the method of achieving full depletion without parasitic substrate currents. It is expected that this new technology can be competitive with modern backside illuminated thick CCDs for use at visible to near-IR telescopes and synchrotron light sources.

Fully Depleted Pinned Photodiode CMOS Image Sensor With Reverse Substrate Bias

“…In normal operation the DDE acquires its potential from the adjacent PPDs and becomes depleted, as described in detail in [7]. By choosing the appropriate doping profile and size of the DDE, its potential can be made lower than the pinning voltage Vpin, but still high enough to create a potential barrier.…”

Characterisation of a novel reverse-biased PPD CMOS image sensor

“…Reverse bias is applied to the back through the conductive periphery of the chip, which is left intentionally undepleted as shown in Figure 4 and described in more detail in [3].…”

“…This implant, called "deep depletion extension" (DDE) is floating and does not connect to the PPDs. As described in [3,4], in normal operation the DDE acquires its potential from the adjacent PPDs and becomes depleted. By choosing the appropriate doping profile and size of the implant, its potential can be made lower than the peak diode voltage (the pinning voltage V pin ), but still high enough to create a potential barrier in the vertical direction.…”

“…The new pixel design is intended to minimize the disruption to the PPD doping profiles, bias and operation, and implements only one additional manufacturing step. Reverse bias is applied to the back through the conductive periphery of the chip, which is left intentionally undepleted as shown in figure 4 and described in more detail in [3].…”