Full-Lock

Kamali, Hadi Mardani; Azar, Kimia Zamiri; Homayoun, Houman; Sasan, Avesta

doi:10.1145/3316781.3317831

Cited by 94 publications

(9 citation statements)

References 27 publications

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“…Another approach to resisting the miter-based SAT attack is adding densely-interconnected instances into the circuit, overwhelming the SAT solver [11]- [13]. These instances typically have many interdependent keys.…”

Section: Point Function-based and Densely-interconnected Locksmentioning

confidence: 99%

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Quantifying the Efficacy of Logic Locking Methods

Sweeney¹,

Garg²,

Pileggi³

2021

Preprint

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The outsourced manufacturing of integrated circuits has increased the risk of intellectual property theft. In response, logic locking techniques have been developed for protecting designs by adding programmable elements to the circuit. These techniques differ significantly in both overhead and resistance to various attacks, leaving designers unable to discern their efficacy. To overcome this critical impediment for the adoption of logic locking, we propose two metrics, key corruption and minimum corruption, that capture the goals of locking under different attack scenarios. We develop a flow for approximating these metrics on generic locked circuits and evaluate several locking techniques.

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Section: Point Function-based and Densely-interconnected Locksmentioning

confidence: 99%

“…From the point-function based locks, we implement SFLL-Flex [16]. Finally, from the densely-interconnected locks, we implement Full-Lock [11] and LEBL [13]. Our miter-based attack implementation uses the SAT solver CaD-iCaL [17].…”

Section: Application Of Metricsmentioning

confidence: 99%

Quantifying the Efficacy of Logic Locking Methods

Sweeney¹,

Garg²,

Pileggi³

2021

Preprint

View full text Add to dashboard Cite

show abstract

“…Full-Lock is a logic locking technique specifically developed to be resistant to the miter-based SAT attack [13] via increasing the execution time of each iteration. This is done by integrating SAT-hard logic into the circuit using a combination of routing obfuscation and look-up tables (LUT).…”

Section: Full-lockmentioning

confidence: 99%

“…Full-Lock utilizes configurable routing and LUTs to obfuscate a set of gates and their corresponding input connections. The configurable routing is implemented with Banyan networks, a class of logarithmic networks, that permutes connections based on a key [13]. The network is made up of a series of 2-input switch boxes which connect the inputs to the outputs, either directly passing through or switched.…”

Section: Full-lockmentioning

confidence: 99%