Front End ASIC design for SiPM readout

Comerma-Montells, A.; Gascón, D.; Garrido, L.; Mendez, C. Delgado; Marín, J.; Pérez, J. M.; Martínez, G.; Freixas, Lluís

doi:10.1088/1748-0221/8/01/c01048

Cited by 18 publications

(8 citation statements)

References 2 publications

(5 reference statements)

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“…For instance, an open-loop implementation of the input current buffer can be found in [18], whereas many examples of circuit configurations that exploit negative feedback to decrease the input resistance of the buffer exist [19][20][21]. As a consequence, the results of our analysis demonstrate the advantages of the current-mode solution over the other readout techniques for SiPM detectors.…”

Section: Fast Pathmentioning

confidence: 81%

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CMOS Image Sensors for Radiation Detection

Guerrini¹

2017

Analog Electronics for Radiation Detection

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Section: Fast Pathmentioning

confidence: 81%

“…19 Common gate M 1 used as current buffer.Eventually, a simple expression of the time jitter can be the gate-referred equivalent noise voltage of the input MOSFET M 1 . The expression 9.30 of the time jitter for the current buffer in…”

mentioning

confidence: 99%

CMOS Image Sensors for Radiation Detection

Guerrini¹

2017

Analog Electronics for Radiation Detection

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“…A signal generator (Tektronix AFG3252) was used to generate the input signal for the ASIC according to the output waveform of the PMT (R5912, signal rise time ~ 8 ns). The S-curve method is used to obtain the threshold of each channel [15]. The Fig.16 (a) shows the change in the thresholds versus Iref2 (in Fig.2).…”

Section: Test Resultsmentioning

confidence: 99%

A multichannel front end ASIC for PMT readout in LHAASO WCDA

Liu

Guo

et al. 2018

J. Inst.

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Time and charge measurements over a large dynamic range from 1 Photo Electron (P.E.) to 4000 P.E. are required for the Water Cherenkov Detector Array (WCDA), which is one of the key components in the Large High Altitude Air Shower Observatory (LHAASO). To simplify the circuit structure of the readout electronics, a front end ASIC was designed. Based on the charge-to-time conversion method, the output pulse width of the ASIC corresponds to the input signal charge information while time information of the input signal is picked off through a discriminator, and thus the time and charge information can be digitized simultaneously using this ASIC and a following Time-to-Digital Converter (TDC). To address the challenge of mismatch among the channels observed in the previous prototype version, this work presents approaches for analyzing the problem and optimizing the circuits. A new version of the ASIC was designed and fabricated in the GLOBALFOUNDRIES 0.35 µm CMOS technology, which integrates 6 channels (corresponding to the readout of the 3 PMTs) in each chip. The test results indicate that the mismatch between the channels is significantly reduced to less than 20% using the proposed approach. The time measurement resolution better than 300 ps is achieved, and the charge measurement resolution is better than 10% at 1 P.E., and 1% at 4000 P.E., which meets the application requirements.

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“…The analog processing chain can be observed in figure 3. The input stage is a current mode amplifier composed of a current conveyor and a closed-loop trans-impedance amplifier, based on previous prototypes produced in other technology [4]. The current conveyor is based on double feedback approach and optimized for SiPM arrays with anode connections.…”

Section: Pacific Architecturementioning

confidence: 99%