From C to Silicon

Thon, L.E.; Rimey, Ken; Svensson, Lars

doi:10.1007/978-1-4615-3570-6_17

Cited by 4 publications

(3 citation statements)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…This is demonstrated in the C-to-Silicon, [23] [24] [25], and the Cathedral-IU2nd synthesis environments, [26] [27], which target the generation of application specific, medium speed processor architectures. The architecture configuration is based on the generic DSP processor shown in Figure 4.…”

Section: Custom Processors: C-to-silicon Cathedralli/2ndmentioning

confidence: 99%

“…Research in this area is still in its infancy. Substantive work has been published in the area of general purpose processors, where most retargetable compilation systems start from an instruction set specification, [25] [49] [50]. This approach is only partially applicable to the domain of application specific architectures due to the implicit architectural assumptions, such as a single tread of control, the data routing choices and the memory hierarchy.…”

Section: Architecture Representation and Modelingmentioning

confidence: 99%

“…The performance of an algorithm on this architecture is strongly determined by loops and branches, due to its control dominated nature. The C2Silicon profiling tool is similar to the Unix gprof utility and was used effectively to study the effect of various architectural trade-offs (for instance, the use of an array-multiplier versus parallel-serial multiplier or the use of in-line code versus subroutines), [25].…”

Section: Profilingmentioning

confidence: 99%

See 2 more Smart Citations

Synthesis for real time systems: Solutions and challenges

Verbauwhede

Rabaey

1995

Journal of VLSI Signal Processing

View full text Add to dashboard Cite

Abstract.A real time system typically combines a variety of implementation technologies and hardware architectures. Deciding how to partition the system and selecting an architectural technology for the sub-systems is by no means a trivial task. These architectural decisions, which can have a major impact on the quality and performance of the final implementation, have to be made at the early stages in the design process, when the impact of the decisions is unclear and can only be quantified using some primitive measures.In this paper, we present our vision on how a next generation of design environment can aid the designer in this decision process. We first identify the problems of designing a heterogeneous real time system by walking through the design process of a complex speech recognition system. Based on this analysis, we propose a system design methodology build on top of current synthesis tools. Today, DSP synthesis tools are application and/or architecture specific, covering subparts of the application once the partitioning is made. To make them useful in the proposed methodology, a unified view on the underlying architecture assumptions is needed. Secondly, good decision making requires an "as-good-as-possible" estimation of the implications of the decision. Therefore, it is important that current manual estimation be enlarged by high level estimation and performance analysis tools.The HYPERSPACE environment, which is currently under development, therefore, consists of three complementary components: a set of architecture specific compilers, a set of estimation and performance analysis tools and an architecture selection and partitioning framework, steered by the designer.

show abstract

Section: Custom Processors: C-to-silicon Cathedralli/2ndmentioning

confidence: 99%

Section: Architecture Representation and Modelingmentioning

confidence: 99%

Section: Profilingmentioning

confidence: 99%

See 1 more Smart Citation