Frequency-adjustable clock oscillator based on frequency-to-voltage converter

Abstract

A frequency-adjustable clock oscillator based on a frequency-tovoltage converter is presented. A new architecture is employed without reference frequency input. The system model shows the conditions of system stability. A compensation circuit was used to cancel the variations of frequency over process and temperature. The range of output frequency is from 22.5 -360 MHz, which is within +4.5% variation in worst cases. The circuit was designed in a 0.13 mm CMOS 3.3 V device process, occupying a chip area of about 0.05 mm 2 . The clock oscillator can achieve 25 ps peak-to-peak jitter, 2 ms locked time and consume 5 m W at a 3.3 V supply voltage and 200 MHz output clock.Introduction: The clock generator is an important component widely used in digital and mixed signal systems. A phase-locked loop (PLL) with a reference frequency input from a crystal oscillator is the most common clock generator of high precision. In low-cost applications, CMOS oscillators, such as RC ring oscillators and LC oscillators, face the challenge of frequency variations with process, temperature and power supply (PVT) [1][2][3]. In this Letter, we report a new clock oscillator based on a frequency-to-voltage converter, using a frequencylocked loop (FLL) to lock the frequency of the voltage-controlled oscillator (VCO), so the frequency is supply-independent. The compensation circuit makes the frequency insensitive to process and temperature. The external adjustable resistor can adjust the frequency continuously. Therefore, the frequency of this clock oscillator is adjustable and PVT-insensitive. Fig. 1 shows the block diagram of the proposed clock oscillator system, which is a negative feedback loop. A bandgap reference provides the supply and temperature independent reference voltage V REF for the operational amplifier (op amp) and charge current generator. The charge current generator is used to generate the charge current I C for the frequency-to-voltage converter (FVC). The FVC converts the feedback clock F FB to a voltage V FVC . The high gain op amp and the negative feedback loop make V FVC equal to V REF . The lowpass filter (LPF) smoothes the ripple of the op amp output V OP and provides the VCO control voltage V CTRL .

Process, voltage and temperature compensation in a 1-MHz 130nm CMOS monolithic clock oscillator with 2.3% accuracy

“…However, this comparison is unfair since our results are simulation results and the results in Blauschild (1994), Sebastiano et al (2011aSebastiano et al ( , 2011b are silicon results ( (Sebastiano et al, 2011a(Sebastiano et al, , 2011b with trimming). For a fair comparison, the simulation results of Yi et al (2009) are used to compare with our simulation results, as shown in Table 1. The oscillator in Yi et al (2009) is also carriermobility-based CMOS oscillator, and the CMOS process in Yi et al (2009) is also 0.13 μm CMOS 3.3 V device process.…”

“…For a fair comparison, the simulation results of Yi et al (2009) are used to compare with our simulation results, as shown in Table 1. The oscillator in Yi et al (2009) is also carriermobility-based CMOS oscillator, and the CMOS process in Yi et al (2009) is also 0.13 μm CMOS 3.3 V device process. Table 1 shows that the variation results of the proposed oscillator outperform that in Yi et al (2009).…”

“…The compensation of the variation of process and temperature of the threshold voltage is similar with Blauschild (1994), but in Blauschild (1994) C OX was not compensated. We will further compensate C OX developed from Yi et al (2009). An NMOS gate oxide capacitance is used as the charge capacitance C 1 , and its value is…”

“…Boas and Olmos (2004) reported an on-chip clock oscillator with good temperature stability, but process compensation was not included. Yi, Chen, and Yao (2009) reported a CMOS stable clock oscillator, but it could not offset the process variation of MOS threshold voltage. Kashmiri, Pertijs, and Makinwa (2010) reported an accurate on-chip clock oscillator, but it dissipated several milliwatts of power and occupied a large die size.…”

“…We combine the ideas in Yi et al (2009) andBlauschild (1994), and also address their limitations. Compared to Yi et al (2009), we further compensate the threshold voltage V t of MOS. Compared to Blauschild (1994), we further compensate the gate oxide capacitance per unit area C OX of MOS.…”