FPGAs in Industrial Control Applications

Monmasson, Éric; Idkhajine, Lahoucine; Cirstea, Marcian; Bahri, Imen; Tisan, Alin; Naouar, Mohamed Wissem

doi:10.1109/tii.2011.2123908

Cited by 461 publications

(204 citation statements)

References 99 publications

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“…FPGAs have an inherently parallel structure and can execute all their tasks simultaneously by hardware implementation of the design [33]. This characteristic can lead to a drastic reduction in execution time [34]. Moreover, processing at logic level enables real-time monitoring and immediate compensation, which is essential in fault-tolerant applications.…”

Section: E the Reconfigurable Controlmentioning

confidence: 99%

Open-circuit switch fault tolerant wind energy conversion system based on six/five-leg reconfigurable converter

Shahbazi

Saadate

Poure

et al. 2016

Electric Power Systems Research

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. (2016) 'Open-circuit switch fault tolerant wind energy conversion system based on six/ ve-leg recon gurable converter.', Electric power systems research., 137 . pp. 104-112. Further information on publisher's website: Use policyThe full-text may be used and/or reproduced, and given to third parties in any format or medium, without prior permission or charge, for personal research or study, educational, or not-for-pro t purposes provided that:• a full bibliographic reference is made to the original source • a link is made to the metadata record in DRO • the full-text is not changed in any way The full-text must not be sold in any format or medium without the formal permission of the copyright holders.Please consult the full DRO policy for further details.

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Section: E the Reconfigurable Controlmentioning

confidence: 99%

Open-circuit switch fault tolerant wind energy conversion system based on six/five-leg reconfigurable converter

Shahbazi

Saadate

Poure

et al. 2016

Electric Power Systems Research

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“…6) [25], which consist of: Phase Detector (PD), Low-pass Filter (LPF), and Voltage Controlled Oscillator (VCO). (19) such that it provides signal x e that involves information about the phase correspondence. Whenx follows x, such thatx ≈ x, the loop is said to be locked.…”

Section: Pll αβ-Trackermentioning

confidence: 99%

“…FPGA allows fast and accurate sampling intervals; thus, high control rate can be achieved [19]. Hence, FPGAs have been recognized as a suitable solution within bilateral teleoperation design [20] [21].…”

Section: Introductionmentioning

confidence: 99%

Enhanced Pseudo-sensorless Bilateral Teleoperation by PLL αβ-tracker and FPGA

Hace

Franc

2014

Automatika

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Original scientific paperIn this paper, the problem of external sensors within bilateral teleoperation is addressed. We propose a Phase Locked Loop (PLL) αβ-tracker that presents an enhanced approach for position and velocity estimation. The proposed approach offers some advantages over the method presented in our previous research that was introduced to enable pseudo-sensorless teleoperation. Such approach applies PMLSM actuators with analog Hall sensors built in a motor housing. They allow obtaining sufficient position, velocity, and force information for teleoperation by a haptic interface. Furthermore, FPGA has been utilized for the implementation in order to achieve high control rate that was already introduced as a necessity in cutting edge performance systems. However, main advantages of the method presented in this paper is attributed to improved system performance due to the better signal-noise ratio and to enhanced flexibility of hardware resources consumption. Thus, high-performance bilateral control can be achieved. Such bilateral teleoperation with a dedicated haptic interface can significantly improve surgical robotics. The proposed approach was experimentally validated by the simple 1-DoF laboratory bilateral teleoperation system. Key words: Velocity Estimation, Phase Locked Loop, Bilateral Teleoperation, Haptics, FPGA Poboljšana pseudo-bezsenzorna bilateralna teleoperacija korištenjem PLL αβ estimatora i FPGA. Glavni predmet ovog rada je problematika korištenja eksternih senzora u procesu bilateralne teleoperacije. U radu je predložen αβ estimator temeljen na principu fazno zatvorene petlje (eng. Phase Locked Loop, PLL) koji se učinkovito koristi za problem istovremene estimacije pozicije i brzine. Predloženi pristup pruža odreîene prednosti u odnosu na metode koje smo prethodno razvili za ostvarenje pseudo-bezsenzorne teleoperacije. Pristup primjenjuje PMLSM aktuatore s analognim Hallovim sondama ugraîenih u metalno kućište. Oni se koriste za dobivanje dovoljno informacija o poziciji, brzini i sili, za teleoperaciju s haptičkim sučeljem. Nadalje, za omogućavanje izvoîenja upravljačkog algoritma s vrlo visokom frekvencijom u svrhu implementacije korišten je FPGA sklop, koji se već pokazao kao nužnost u primjeni na sustavima s visokom razinom performansi. Unatoč tome, glavna prednost metode koja je predložena u ovom radu odnosi se na poboljšanje performansi sustava zbog boljeg omjera signala i šuma te povećanu fleksibilnost potrošnje sklopovskih resursa. Prema tome, moguće je ostvariti bilateralno upravljanje s visokim performansama. Takva bilateralna teleoperacija s prilagoîenim haptičnim sučeljem može utjecati na značajna poboljšanja u kirurškoj robotici. Predloženi pristup je eksperimentalno validiran na jednostavnom bilateralnom teleoperacijskom sustavu s jednim stupnjem slobode.Ključne riječi: estimacija brzine, fazno zatvorena petlja, bilateralna teleoperacija, haptično sučelje, FPGA

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“…FPGAs [16] basically contain an array of logic elements or cells (each cell containing look-up tables and registers), whose interconnections are decided by the contents of a random access memory (RAM). The FPGA design, typically using hardware description languages, decides the final circuit structure to achieve a desired functionality and it is therefore said to be hardware programmable.…”

Section: Introductionmentioning

confidence: 99%

An Efficient FPGA based Real-Time Implementation Shunt Active Power Filter for Current Harmonic Elimination and Reactive Power Compensation

Charles¹,

Vivekanandan²

2015

Journal of Electrical Engineering and Technology

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-This paper proposes a new approach of Field Programmable Gate Array (FPGA) controlled digital implementation of shunt active power filter (SAPF) under steady state and dynamic operations. Typical implementations of SAPF uses microprocessor and digital signal processor (DSP) but it limited for complex algorithm structure, absence of feedback loop delays and their cost can be exceed the benefit they bring. In this paper, the hardware resources of an FPGA are configured and implemented in order to overcome conventional microcontroller or digital signal processor implementations. This proposed FPGA digital implementation scheme has very less execution time and boosts the overall performance of the system. The FPGA controller integrates the entire control algorithm of an SAPF, including synchronous reference frame transformation, phase locked loop, low pass filter and inverter current controller etc. All these required algorithms are implemented with a single all-on chip FPGA module which provides freedom to reconfigure for any other applications. The entire algorithm is coded, processed and simulated using Xilinx 12.1 ISE suite to estimate the advantages of the proposed system. The coded algorithm is also defused on a single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype and experimental results thus obtained match with simulated counterparts under the dynamic state and steady state operating conditions.

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FPGAs in Industrial Control Applications

Cited by 461 publications

References 99 publications

Open-circuit switch fault tolerant wind energy conversion system based on six/five-leg reconfigurable converter

Open-circuit switch fault tolerant wind energy conversion system based on six/five-leg reconfigurable converter

Enhanced Pseudo-sensorless Bilateral Teleoperation by PLL αβ-tracker and FPGA

An Efficient FPGA based Real-Time Implementation Shunt Active Power Filter for Current Harmonic Elimination and Reactive Power Compensation

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