FPGA realisation of an area efficient SVPWM modulator for three phase induction motor drive

Pongiannan, R. K.; Paramasivam, S.; Yadaiah, N.

doi:10.1504/ijpelec.2010.031193

Cited by 7 publications

(7 citation statements)

References 14 publications

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“…The arithmetic calculations for the equation (a Â b) þ are presented for fixed point format with integer part (Qm), fixed point format with fractional part (Qn) and fixed point format with integer þ fractional part (Qm.n) in Oberstar (2007), the corresponding errors are shown in Table 1, and the procedure is presented in Pongiannan et al (2010).…”

Section: Digital Data Representation Using Different Formatsmentioning

confidence: 99%

“…This format must be the result of a compromise between the required computing accuracy and the available hardware resources. In the power electronic converter, control using Q-format representation is presented in Pongiannan et al (2010).…”

Section: Literature Reviewmentioning

confidence: 99%

“…,Bejaoui et al (2009) andPongiannan et al (2010).The block schematic and the functional flow of QALU are shown inFigures 1 and 2respectively. The functional flow for addition and its pseudo code are shown inFigures 3 and 4respectively inMitra (2001) andPongiannan et al (2010).…”

mentioning

confidence: 99%

“…The functional flow for addition and its pseudo code are shown inFigures 3 and 4respectively inMitra (2001) andPongiannan et al (2010).…”

mentioning

confidence: 99%

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FPGA – realization of digital PWM controller using Q-format-based signal processing

Pongiannan¹,

Sathiyanathan²,

Vinothkumar³

et al. 2013

Journal of Vibration and Control

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This paper first presents a review of very large scale integration signal processing applications using Q-format data representation, through field programmable gate arrays. Also, this paper presents a comprehensive review of Q-formatbased applications, which include arithmetic computations in signal processing, linear time-invariant systems, finite impulse response filter, 3-D graphics system, personal digital assistant, and neural networks and power electronic converter control are discussed. Finally, a Q-format-based arithmetic logic unit (QALU) has been designed and developed using very high speed integrated circuit hardware description language. The QALU is used to develop the space vector pulse width modulation control, and the simulation and experimental results are presented.

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Section: Digital Data Representation Using Different Formatsmentioning

confidence: 99%

Section: Literature Reviewmentioning

confidence: 99%

mentioning

confidence: 99%

“…The functional flow for addition and its pseudo code are shown inFigures 3 and 4respectively inMitra (2001) andPongiannan et al (2010).…”

mentioning

confidence: 99%

See 2 more Smart Citations

FPGA – realization of digital PWM controller using Q-format-based signal processing

Pongiannan¹,

Sathiyanathan²,

Vinothkumar³

et al. 2013

Journal of Vibration and Control

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show abstract

“…In Pongiannan et al (2010), paper presents an area efficient single chip field programmable gate (FPGA) array implementation for space vector pulse width modulator (SVPWM). The control algorithm has been developed using a very high speed integrated circuit hardware description language and FPGA, which provides great flexibility and technological independence.…”

Section: Introductionmentioning

confidence: 99%

Selective harmonic elimination in VSI-fed induction motor drives using swarm and genetic optimisation

Azab

Awadallah

2013

IJPELEC

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The paper presents non-traditional solutions to the problem of selective harmonic elimination (SHE) in induction motor drives fed by three-phase voltage-source inverter (VSI). The problem is independently solved using genetic algorithms (GA) and particle swarm optimisation (PSO). The inverter switching angles are determined such that the low-order harmonics up to the 17th are eliminated, while the fundamental component is set at a desired value. Findings of the research show that both routines could converge to accurate solutions. PSO outperforms GA in terms of the time of convergence and obtained value of the objective function, while GA is characterised with better robustness. The performance of the VSI-fed induction motor drive is studied under the SHE switching pattern. Results clearly show the merits of applying the SHE technique to the induction motor drive.Reference to this paper should be made as follows: Azab, M. and Awadallah, M.A. (2013) 'Selective harmonic elimination in VSI-fed induction motor drives using swarm and genetic optimisation', Int.

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The Performance Analysis of Single Phase PWM Inverter with Various Delay Times

R K

2023

2023 International Conference on Circuit Power and Computing Technologies (ICCPCT)

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FPGA realisation of an area efficient SVPWM modulator for three phase induction motor drive

Cited by 7 publications

References 14 publications

FPGA – realization of digital PWM controller using Q-format-based signal processing

FPGA – realization of digital PWM controller using Q-format-based signal processing

Selective harmonic elimination in VSI-fed induction motor drives using swarm and genetic optimisation

The Performance Analysis of Single Phase PWM Inverter with Various Delay Times

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