2012
DOI: 10.1109/tgrs.2011.2171693
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FPGA Implementation of the N-FINDR Algorithm for Remotely Sensed Hyperspectral Image Analysis

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Cited by 62 publications
(35 citation statements)
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“…If we consider the area of spectral unmixing, implementation of endmember extraction algorithms using a Xilinx Virtex-4 FPGA have been recently described in [185]. This FPGA model is similar to radiation-hardened FPGAs certified for space operation.…”
Section: Fpgas For Hyperspectral Processingmentioning
confidence: 99%
See 1 more Smart Citation
“…If we consider the area of spectral unmixing, implementation of endmember extraction algorithms using a Xilinx Virtex-4 FPGA have been recently described in [185]. This FPGA model is similar to radiation-hardened FPGAs certified for space operation.…”
Section: Fpgas For Hyperspectral Processingmentioning
confidence: 99%
“…Similarly FPGA implementations of abundance estimation algorithms have also been described in [186]. This implementation was tested in the same FPGA used in [185], and achieved a speedup factor of 10x when processing the AVIRIS Cuprite scene and over 12# when it comes to the AVIRIS Jasper Ridge scene. Authors also reach the conclusion that, using FPGAs, the execution time scales linearly with the size of the image.…”
Section: Fpgas For Hyperspectral Processingmentioning
confidence: 99%
“…All correlation logics are processing in parallel. To calculate the range, the correlation logic with valid peak detection is taken and the delay of the reference PRBS of the respective logic is noticed [10]. Table 1 depicts the simulated results and draws a comparison between the previous result and those obtained through our algorithm.the results are increasing and show a significant improvement over the previous result.…”
Section: F Digital Correlatormentioning
confidence: 90%
“…The runtime of the RX and DWEST families that use the DR step is acceptable; these methods can be used in real-time applications by using parallel processing or hardware implementation of algorithms using field programmable gate array (FPGA) [32,33]. Of all the methods, the FFT-RX has the best runtime: its runtime is about 124 times better than the slowest method, the Kernel-RX.…”
Section: Runtime Evaluationmentioning
confidence: 99%