2016 IEEE International Conference on Bioinformatics and Biomedicine (BIBM) 2016
DOI: 10.1109/bibm.2016.7822556
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FPGA implementation of the coupled filtering method

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Cited by 3 publications
(3 citation statements)
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“…In recent years, in order to meet the application of disaster relief, military deployment and other situations, the demand for fast and real-time remote sensing image orthographic correction is increasing. To improve the image processing speed, researchers have proposed various parallel processing and hardware acceleration methods [7][8][9][10][11]. For example, Warpenburg and Siegel perform resampling in the single-instruction multi-data stream environment [12].…”
Section: Introductionmentioning
confidence: 99%
“…In recent years, in order to meet the application of disaster relief, military deployment and other situations, the demand for fast and real-time remote sensing image orthographic correction is increasing. To improve the image processing speed, researchers have proposed various parallel processing and hardware acceleration methods [7][8][9][10][11]. For example, Warpenburg and Siegel perform resampling in the single-instruction multi-data stream environment [12].…”
Section: Introductionmentioning
confidence: 99%
“…Tomasi et al [ 18 ] proposed a stereo vision algorithm using an FPGA to perform the correction of video graphics array images (57 fps). Pal et al [ 19 ], Wang et al [ 20 ], and Zhang et al [ 21 ] applied FPGAs to accelerate the image data and signal filtering processes. Ontiveros-Robles et al [ 22 , 23 ] proposed FPGA-based hardware architectures for real-time edge detection using fuzzy logic algorithm.…”
Section: Introductionmentioning
confidence: 99%
“…In recent decades, the field programmable gate array (FPGA) has been widely used in the image processing (such as imaging compression [7,8], filtering [9][10][11], edge detection [12,13], real-time processing of video images [14,15], and motion estimation [16][17][18]) to make real-time processing come true. González et al [16,17] optimized matching-based motion estimation algorithms using an Altera custom instruction-based paradigm and a combination of synchronous dynamic random access memory (SDRAM) and on-chip memory in Nios II processors, and presented a low-cost system.…”
Section: Introductionmentioning
confidence: 99%