FPGA Implementation of Soft Output Viterbi Algorithm Using Memoryless Hybrid Register Exchange Method

Abstract

The importance of convolutional codes is well established. They are widely used to encode digital data before transmission through noisy or error-prone communication channels to reduce occurrence of errors and memory. This paper presents novel decoding technique, memoryless Hybrid Register Exchange with simulation and FPGA implementation results. It requires single register as compared to Register Exchange Method (REM) & Hybrid Register Exchange Method (HREM); therefore the data transfer operations and ultimately the switching activity will get reduced.

Design of Trellis code modulation decoder using Hybrid Register Exchange Method

“…3. Block diagram of viterbi decoder [5] TCM decoder is nothing but the viterbi decoder (i.e., the maximum likelihood decoder). This algorithm involves large amount of computation and storage as it involves calculating the branch costs of a survivor path, but inorder to reduce the hardware requirement of viterbi decoder we are using Hybrid Register Exchange Method (HREM) to design the survivor memory unit.…”

“…In register exchange method separate register is used for each stage of viterbi algorithm. The main drawback of register exchange method is it requires Hybrid Register Exchange Approach [5] frequent switching activity while exchanging the decoded data from one register to other register. This problem can be resolved by using hybrid register exchange method (HREM) which is combination of the register exchange method (REM) and Traceback (TB) technique.…”