FPGA Implementation of Secure Protocol for Hardware Authentication and Activation

Abstract

This thesis proposes a novel protocol that utilizes a Physically Unclonable Function (PUF) on a field-programmable gate array (FPGA) to provide secure remote activation and hardware authentication for logic-locked chip designs. The PUF generates fingerprint data that is used as an entropy source in the RSA encryption algorithm. This approach allows designers to authorize manufacturers to produce large quantities of locked chip and securely transmit keys to unlock the chip for the end-users. This method helps curve counterfeiting, overproduction, and intellectual property theft from untrusted manufacturing facilities. Overall, this protocol contributes to the development of secure hardware design and remote authentication methods. v vi