2015
DOI: 10.5815/ijcnis.2015.12.07
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FPGA Implementation of Secure Force (64-Bit) Low Complexity Encryption Algorithm

Abstract: Abstract-Field-Programmable Gate Arrays (FPGAs) have turned out to be a well-liked target for implementing cryptographic block ciphers, a well-designed FPGA solution can combine some of the algorithmic flexibility and cost efficiency of an equivalent software implementation with throughputs that are comparable to custom ASIC designs. The recently proposed Secure Force (SF) shows good results in terms of resource utilization compared to older ciphers. SF appears as a promising choice for power and resource cons… Show more

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Cited by 10 publications
(6 citation statements)
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“…Table 1 shows how the enhanced (EDAI) algorithm is used for authentication and data integrity for IoT devices using widely used substitution-permutation networks (SPNs) and the Festal encoding method [57]. This method functions dynamically, merging the features of the Language Server Protocol (LSP) and VESTL into a single form to boost the security of IoT particles in fewer encryption rounds than currently available techniques.…”
Section: Improving the Design Of Iot Algorithmsmentioning
confidence: 99%
“…Table 1 shows how the enhanced (EDAI) algorithm is used for authentication and data integrity for IoT devices using widely used substitution-permutation networks (SPNs) and the Festal encoding method [57]. This method functions dynamically, merging the features of the Language Server Protocol (LSP) and VESTL into a single form to boost the security of IoT particles in fewer encryption rounds than currently available techniques.…”
Section: Improving the Design Of Iot Algorithmsmentioning
confidence: 99%
“…The key generation process involves complex mathematical operations. In WSN environment these operations can be performed wholly on decoder [58], [63], [64], on the contrary in IoT the node themselves happens to serve as the Internet node, therefore, computations involved in the process of key generation must also be reduced to the extent that it ensures necessary security. In the sub-sections the process of key expansion and encryption are discussed in detail.…”
Section: Cryptographic Algorithms For Iotmentioning
confidence: 99%
“…Several FPGA based cryptosystems have been proposed with the aim to achieve high throughput values [14][15][16][17][18]. A usual practice is to use loop unroll technique so that the iterative rounds in an encryption algorithm are executed in parallel, resulting in better throughput.…”
Section: Hardware Implantation Of Cryptosystemsmentioning
confidence: 99%