2004
DOI: 10.1016/j.asoc.2004.03.008
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FPGA implementation of population-based ant colony optimization

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Cited by 48 publications
(6 citation statements)
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“…A noteworthy exception to these directions is the specific design of an ACO algorithm to allow an effective hardware implementation on field-programmable gate arrays (FPGAs). 26 We follow the second direction. Thus, multiple ant colonies are employed in parallel.…”
Section: Articlementioning
confidence: 99%
“…A noteworthy exception to these directions is the specific design of an ACO algorithm to allow an effective hardware implementation on field-programmable gate arrays (FPGAs). 26 We follow the second direction. Thus, multiple ant colonies are employed in parallel.…”
Section: Articlementioning
confidence: 99%
“…After the MP movement has stopped, the outside observer processor collects the tuple .5, 6, 2, 10, 2, 3/ from the pixel at .8, 14/. It computes the center at .8 6 5 , 14 C 2 5 / according to Equation (2), the variances 2…”
Section: Examplementioning
confidence: 99%
“…This problem refers to so called creatures that move on a grid according to local rules with the goal to visit all grid points efficiently in an unknown environment. In , FPGAs have been used for implementing Ant Colony Optimization algorithms. The difference to the work presented here is that MPs are implemented as dynamic elements, that is as agents with states and data, which are passed from one processor node to the next one, whereas in the cited works, the agents are realized as more or less static data structures whose contents are updated with dedicated hardware.…”
Section: Related Workmentioning
confidence: 99%
“…However, a random number generator was not implementable in hardware at that time. Scheuermann and his colleagues took the single machine total tardiness problem (SMTTP) as a typical example, presenting a hardware implementation of population-based ant colony optimization (P-ACO) on field-programmable gate arrays (FPGAs) (Scheuermann et al, 2004(Scheuermann et al, , 2007. In that work, they described the P-ACO algorithm and presented a circuit architecture that facilitates efficient FPGA implementations.…”
Section: Introductionmentioning
confidence: 99%