2016
DOI: 10.1007/978-3-319-42007-3_54
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FPGA Implementation of Neuron Model Using Piecewise Nonlinear Function on Double-Precision Floating-Point Format

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(2 citation statements)
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“…In the first case, the design optimization depends on the type of memories available in the device; in the second case, it is possible to develop logical simplifications. Other approximation form is the Piece Wise Lineal (PWL), which approaches each section with a straight line, in this case a multiplication and a sum are necessary [18,19,21,38,44,45,63,66,68,69,70].…”
Section: State Of the Art Of Hardware Implementation For Sigmoidal Fumentioning
confidence: 99%
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“…In the first case, the design optimization depends on the type of memories available in the device; in the second case, it is possible to develop logical simplifications. Other approximation form is the Piece Wise Lineal (PWL), which approaches each section with a straight line, in this case a multiplication and a sum are necessary [18,19,21,38,44,45,63,66,68,69,70].…”
Section: State Of the Art Of Hardware Implementation For Sigmoidal Fumentioning
confidence: 99%
“…Floating point arithmetic can be used on digital devices, but these operations need a high number of clock cycles [41], great consumption of power and hardware resources [42][43][44][45]. However, floating point numerical representation has a wide range with a good resolution [46,47].…”
Section: Introductionmentioning
confidence: 99%