2011
DOI: 10.33899/rengj.2011.27044
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FPGA Implementation Of Elementary Function Evaluation Unit Using CORDIC and Lookup tables

Abstract: In this paper, a hardware computing unit has been designed and implemented. This unit computes many elementary functions (such as sine, cosine, tan-1 , sinh, cosh, and square root) that their computing by using software systems requires thousands of clock cycles as an execution time. The architecture of the function computation has been designed by using VHDL and placed on XC3S500E FPGA chip in Spartan 3E as a target technique. In this paper, two algorithms have been used in computing the mathematical function… Show more

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