FPGA Implementable Frame Synchronization Algorithm for Burst Mode GMSK

Abstract

In time division multiple access (TDMA) communication systems, correctly estimating the synchronization parameters is very important for reliable data transfer. The algorithms used for frequency/phase and symbol timing estimates are generally accepted as knowing the start of signal (SoS) parameter. Therefore, within these parameters, the SoS parameter is of particularly great importance. In this study, a reduced version of the SoS estimation algorithm introduced by Hosseini and Perrins is presented to estimate SoS for Gaussian Minimum Shift Keying (GMSK) modulated signals in burst format over additive white Gaussian noise (AWGN) channels. The reduced algorithm can be implemented on FPGA by using half the number of complex multipliers that would be required by the double correlation method and is robust to carrier frequency/phase errors. Simulations performed under 0.1 normalized frequency offset conditions show that the proposed algorithm has a probability of false lock which is less than 2 7 10 − × , even at 0 dB SNR level.