FPGA based multi-standard configurable FSK demodulator

Azmi, Haytham; Elsimary, Hamed; Youssef, Mohamed S.; Safwat, A.

doi:10.1016/j.vlsi.2003.08.006

Cited by 3 publications

References 2 publications

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Design of a DPSK Modem Using CORDIC Algorithm and Its FPGA Implementation

Bag

Roy

Dutta

et al. 2014

IETE Journal of Research

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In the present work, a power efficient differential phase shift keying (DPSK) modem has been implemented using COordinate Rotation DIgital Computer (CORDIC) algorithm in hardware descriptive language (VHDL) code. Here, CORDIC algorithms are used to generate the carrier in the modulator and to implement the multiplier in the demodulator. Carrier generator on the same chip minimizes the effect of noise significantly. Single-chip implementation provides a low power DPSK modem operating with high frequency which is suitable for wireless communication system. The CORDIC algorithm based DPSK modem is found to be a much efficient system in terms of reduced hardware cost, improved performance, and included flexibility. Importance of portable field programmable gate array (FPGA) based device for wireless communication system and system on single chip is now growing rapidly. In this context, the proposed modem provides an efficient alternative over conventional DPSK modem. Real-time verification is performed using Kintex-7 FPGA board. The performance of the proposed modem has been compared with a normal DPSK modem implemented in software defined radio kit using Xilinx block and Spartan-6 FPGA.

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