FPGA Based Low Power Router Design Using High Speed Transeceiver Logic IO Standard

Abstract

Abstract-Communication is the major aspect that plays an important role in success of any organization. Information in the same way is another aspect as to have communication data or information is must. So with the help of computer networks it is possible to build an environment of communication and information. Router is main component of computer networks is an intelligent device uses to transfer data packets between various computer networks. Router must consume low power to perform its work in an efficient manner. To achieve the same the work has been done to make a FPGA based low power design using different standards of HSTL.

Power and Time Delay Analysis of Simple Comparator Implemented On Different Type of FPGA

“…The same is done by some scientist, virtually using Xilinx, i.e. observing the timing constraint [8] and power [9] for different projects [11]. In contrary to this, we has compared level of power consumed and delays encountered by the simple comparator algorithm for different platforms of FPGA.…”