FPGA-based implementation of recursive algorithms

Abstract

The paper suggests a novel method for implementing recursive algorithms in hardware. The required support for recursion has been provided through a modular and a hierarchical specification of a control unit that can be translated to an implementation of the respective hardware circuit on the basis of a recursive hierarchical finite state machine and through a mechanism that permits the contents of an execution unit to be stored/restored between hierarchical calls/returns. The paper describes all the details that are required to implement recursive algorithms in hardware. It begins with software (Cþþ) models and finishes with synthesizable VHDL codes. Two practical applications of recursive algorithms in the data sorting and compression area have been studied in detail. q 2004 Published by Elsevier B.V.

Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers

“…• Data compression/decompression have been provided with the aid of slightly modified Huffman coding, which a) settles repeating coefficients for matrix don't care values because as a rule the number of don't cares is significantly greater than the number of ones and zeros; and b) is based on effective recursive procedures considered in detail in [6]. Table 1 demonstrates the results of experiments (for data exchange through the Ethernet for RC200 board [7]), which make possible to estimate the advantages and disadvantages of the technique considered in Fig.…”

Intelligent Systems Engineering with Reconfigurable Computing

“…The suggested design method has been applied for solving the knapsack problem by a backtracking algorithm. An RHFSM model is also very useful for specifying control algorithms in an HDL as shown in [14].…”

“…For hardware implementation, the selected recursive algorithm has firstly been described with the aid of Hierarchical Graph-Schemes (HGS) [14]. The resulting HGS composed of two modules z 0 and z 1 is shown in Fig.…”

“…An algorithm described in HGS can be implemented in hardware with the aid of a recursive hierarchical finite state machine (RHFSM) [14]. Fig.…”

E-learning Tools and Web-resources for Teaching Reconfigurable Systems

“…The generalized design templates enable students to select and customize a template for a particular circuit. For example, the design template for a hierarchical finite state machine (FSM) [13] specifies the basic functionality of fundamental blocks such as stacks and combinational circuits with control facilities at two levels, for state transitions within the active FSM and between different concurrent or sequential FSMs. c. Certain parts of examples can be reused in student projects.…”