FPGA-based hardware-in-the-loop for multi-domain simulation

Benhamadouche, Abdelouahab Djoubair; Djahli, F.; Ballouti, Adel; Sahli, Abdeslem

doi:10.1142/s179396231950020x

Cited by 7 publications

(2 citation statements)

References 23 publications

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“…In a single simulation software, models are executed to enable verification and analysis of system dynamic behaviour. After that, the digital part, in this work a DPC controller, is implemented in an FPGA device using dedicated software with the intention to achieve hardware experiments (Benhamadouche et al, 2019).…”

Section: Simulation Resultsmentioning

confidence: 99%

Enhanced FPGA-Based Controller for Three Phase Shunt Active Power Filter

Benhamadouche

Sahli

Bakhti

et al. 2023

Power Electronics and Drives

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In this paper, a three-phase shunt active power filter (SAPF) controller with a fully digital implementation is presented. The main goal of this contribution is to implement a digital direct power control (DDPC) algorithm without phase-locked-loop (PLL) for SAPF. This algorithm is intended for power quality improvement and current harmonic elimination. The controller introduced in this paper is cost-effective, has a fast-dynamic response, and has a simple hardware implementation. In order to comply with the above specifications, a dedicated controller has been conceived and fully implemented within a field-programmable gate array (FPGA) device. This FPGA-based controller integrates the whole signal-processing functions needed to drive the SAPF, as well as an original method for sector identification. The intended controller provides the desired power references to select the optimal switching sequences. The switching orders follow the grid reference to drive the voltage source inverter (VSI), so the SAPF achieves good performances while ensuring balanced overall supply currents, unity power factor, and reduced harmonic load currents. The proposed digital implementation achieves a valuable compromise between fast dynamic response, minimum execution time, and reduced FPGA resources, through a simple hardware design implementation. The entire system is developed and simulated using VHDL and VHDL-AMS languages.

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Section: Simulation Resultsmentioning

confidence: 99%

Enhanced FPGA-Based Controller for Three Phase Shunt Active Power Filter

Benhamadouche

Sahli

Bakhti

et al. 2023

Power Electronics and Drives

Self Cite

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“…The methodology for developing AFE rectifiers comprises real-time simulation steps to validate control concepts and ensure safe implementation with hardware. Hardware-inthe-Loop (HIL) simulation is a widely adopted technique in electrical systems for achieving real-time system responses with minimal numerical errors [4]. HIL simulation entails connecting a physical controller to a virtual plant executed on a real-time simulator instead of a physical plant.…”

Section: Introductionmentioning

confidence: 99%

Real-time Simulation Framework for Validating Controllers of Virtual Synchronous Generators

Chowdhury,

Strayóczky,

Süto

2023

RE&PQJ

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The utilization of active rectifiers as converters in the interface between AC and DC microgrids has become a prevalent practice owing to their capacity to facilitate bidirectional power flow. The contemporary methodology for the development of power converters includes the integration of real-time simulation steps for the validation of control schemes and the assurance of safe implementation with hardware. The present study proposes a methodology for developing a real-time Hardware-in-theLoop (HIL) simulation framework, which aims to facilitate the rapid prototyping of advanced control algorithms for an ActiveFront-End (AFE) rectifier, especially a Virtual Synchronous Generator (VSG) control strategy. This approach aims to enhance the dynamic performance and stability of low-inertia power systems by mimicking the behavior of a synchronous generator, thereby providing virtual inertia to the power system. The control schemes and the primary circuit models are designed and implemented utilizing Matlab/Simulink and are optimized for code generation.

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Lyapunov stability analysis and FIL implementation for boundary‐based hybrid controller in boost converter

Patel,

Shah

2024

Adv Control Appl

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This paper presents a comprehensive stability analysis of the boundary‐based hybrid control (BBHC) algorithm designed for boost converter. The stability assessment is carried out utilizing multiple Lyapunov functions, addressing both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) operation. The boost converter is modeled as a hybrid automaton to capture its dynamic behavior accurately. Through rigorous Lyapunov stability analysis, this study demonstrates the effectiveness of the BBHC algorithm in ensuring stable operation of the boost converter across various operating modes. Additionally, the proposed control algorithm's validation is conducted using the FPGA‐in‐the‐loop (FIL) technique, highlighting its efficiency and robustness in real‐world applications. This research contributes valuable insights into the design and implementation of stable control strategies for boost converter, emphasizing the practical utility of the BBHC algorithm with FIL for enhanced performance and reliability in power electronics systems.

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FPGA-based hardware-in-the-loop for multi-domain simulation

Cited by 7 publications

References 23 publications

Enhanced FPGA-Based Controller for Three Phase Shunt Active Power Filter

Enhanced FPGA-Based Controller for Three Phase Shunt Active Power Filter

Real-time Simulation Framework for Validating Controllers of Virtual Synchronous Generators

Lyapunov stability analysis and FIL implementation for boundary‐based hybrid controller in boost converter

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