FPGA-based front-end electronics for positron emission tomography

Haselman, Michael; Miyaoka, Robert S.; Lewellen, T.K.; Hauck, Scott; McDougald, Wendy; DeWitt, Dawn E.

doi:10.1145/1508128.1508143

“…Field Programmable Gate Arrays (FPGAs) came up as a possible alternative, both for their competitive cost and their re-programmability. Moreover, these devices have already been used for TOF calculations [2] [3].…”

Section: Introductionmentioning

confidence: 99%

Time of flight measurements based on FPGA using a breast dedicated PET

Aguilar¹,

Garcia-Olcina²,

Martos³

et al. 2014

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IOP PublishingAguilar, A.; García Olcina, R.; Martos, J.; Soret, J.; Torres-Pais, J.; Benlloch Baviera, JM.; González Martínez, AJ.... (2014) ABSTRACT: In this work the implementation of a Time-to-Digital Converter (TDC) using a Nutt delay line FPGA-based and applied on a Positron Emission Tomography (PET) device is going to be presented in order to check the system's suitability for Time of Flight (TOF) measurements. In recent years, FPGAs have shown great advantages for precise time measurements in PET. The architecture employed for these measurements is described in detail. The system developed was tested on a dedicated breast PET prototype, composed of LYSO crystals and Positive Sensitive Photomultipliers (PSPMTs). Two distinct experiments were carried out for this purpose. In the first test, system linearity was evaluated in order to calibrate the time measurements, providing a linearity error of less than 2% and an average time resolution of 1.4 ns FWHM. The second set of measurements tested system resolution, resulting in a FWHM as good as 1.35 ns. The results suggest that the coincidence window for the current PET can be reduced in order to minimize the random events and thus, achieve better image quality.

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“…However, the new system is more compact and designed to support both our continuous detector development efforts (cMiCES) and our discrete crystal depth-of-interaction detector designs (dMiCES) [2][3][4]. It implements many of the FPGA pulse processing algorithms we have previously reported on [6][7][8].…”

Section: Introductionmentioning

confidence: 99%

Evolution of the design of a second generation FireWire based data acquisition system

Lewellen¹,

Miyaoka²,

MacDonald³

et al. 2011

2011 IEEE Nuclear Science Symposium Conference Record

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Our laboratory has previously reported on the basic design concepts of an updated FireWire based data acquisition system for depth-of-interaction detector systems designed at the University of Washington. The new version of our data acquisition system leverages the capabilities of modern field programmable gate arrays (FPGA) and puts almost all functions into the FPGA, including the FireWire elements, the embedded processor, and pulse timing and integration. The design is centered around an acquisition node board (ANB) that includes 64 serial ADC channels, one high speed parallel ADC, FireWire 1394b support, the FPGA, a serial command bus and signal lines to support a rough coincidence window implementation to reject singles events from being sent on the FireWire bus. Adapter boards convert detector signals into differential paired signals to connect to the ANB. In this paper we discuss many of the design details, including steps taken to minimize the number of layers in the printed circuit board and to avoid skewing of parallel signals and unwanted bandwidth limitations.

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“…However, the new system is more compact and designed to support both our continuous detector development efforts (cMiCES) and our discrete crystal depth-of-interaction detector designs (dMiCES) [2–4]. It implements many of the FPGA pulse processing algorithms we have previously reported on [6–8]. …”

Section: Introductionmentioning

confidence: 99%

Evolution of the design of a second generation FireWire based data acquisition system

Lewellen

¹

,

Miyaoka

²

,

MacDonald

³

et al. 2010

IEEE Nuclear Science Symposuim &Amp; Medical Imaging Conference

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Our laboratory has previously reported on the basic design concepts of an updated FireWire based data acquisition system for depth-of-interaction detector systems designed at the University of Washington. The new version of our data acquisition system leverages the capabilities of modern field programmable gate arrays (FPGA) and puts almost all functions into the FPGA, including the FireWire elements, the embedded processor, and pulse timing and integration. The design is centered around an acquisition node board (ANB) that includes 64 serial ADC channels, one high speed parallel ADC, FireWire 1394b support, the FPGA, a serial command bus and signal lines to support a rough coincidence window implementation to reject singles events from being sent on the FireWire bus. Adapter boards convert detector signals into differential paired signals to connect to the ANB. In this paper we discuss many of the design details, including steps taken to minimize the number of layers in the printed circuit board and to avoid skewing of parallel signals and unwanted bandwidth limitations.

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FPGA-based front-end electronics for positron emission tomography

Cited by 24 publications

References 9 publications

Time of flight measurements based on FPGA using a breast dedicated PET

Time of flight measurements based on FPGA using a breast dedicated PET

Evolution of the design of a second generation FireWire based data acquisition system

Evolution of the design of a second generation FireWire based data acquisition system

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