FPGA-Based Design for Online Computation of Multivariate Empirical Mode Decomposition

Gul, Sikender; Siddiqui, Muhammad Faisal; Rehman, Naveed ur

doi:10.1109/tcsi.2020.3012351

Cited by 12 publications

(5 citation statements)

References 30 publications

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“…Whereas the number of fully used LUT-FF pairs is more in our design. As compared to Gul et al, 21 the number of slice LUTs and DSP48E1s used by our design is less. On the other hand, our design took the least time in order to produce the output.…”

Section: Resultsmentioning

confidence: 64%

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Field‐programmable gate array‐based design for real‐time computation of ensemble empirical mode decomposition

Das

Pradhan

2021

Circuit Theory & Apps

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Empirical mode decomposition (EMD) is considered as a suitable method when the signal to be analyzed is nonlinear or nonstationary in nature. But, EMD suffers from a problem known as mode mixing. To, reduce this problem, ensemble EMD (EEMD) was proposed. In this paper, we have presented a fast field-programmable gate array (FPGA)-based design for EEMD. Where calculation of output can be done in a parallel manner for different realizations.The design has a comparatively less execution time, and the execution time of the proposed EEMD design is even less than some state-of-the-art EMD-based design, although the architecture of EEMD is more complex, when compared with the EMD design. In this work, we have also performed an FPGA implementation of the EMD algorithm. The root mean square error (RMSE) and the correlation values of the intrinsic mode function (IMFs) obtained from the proposed EMD and EEMD designs are compared. The proposed FPGA-based architecture of the EEMD algorithm is designed using Verilog-hardware description language (HDL) and implemented on a Kintex-7 FPGA. The EEMD architecture consists of cubic Hermite spline interpolation (CHSI) and cubic spline interpolation (CSI) for the envelope generation. K E Y W O R D Sempirical mode decomposition (EMD), ensemble empirical mode decomposition (EEMD), field-programmable gate array (FPGA), parallel architectures

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Section: Resultsmentioning

confidence: 64%

“…In this design integer data type was used which leads to increase in truncation errors. An FPGA-based design for multivariate version of EMD was proposed in Gul et al 21 In this design, the authors used LI and CSI for the envelope computation. Their proposed design was operated at a clock rate and sampling frequency of 31 MHz.…”

Section: Introductionmentioning

confidence: 99%

Field‐programmable gate array‐based design for real‐time computation of ensemble empirical mode decomposition

Das

Pradhan

2021

Circuit Theory & Apps

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“…Separately predicting each component of load through data decomposition is an effective way for RIES load prediction [16]. As an adaptive signal processing method suitable for non-stationary and nonlinear signals [17], AVMD overcomes the hard band limits of wavelet approaches and has more mathematical theoretical support than empirical mode decomposition [17]. The target of AVMD is to decompose the multi-energy loads into a discrete number of components, called intrinsic mode functions (IMFs) u k , corresponding to different frequencies and a residue.…”

Section: B Data Decompositionmentioning

confidence: 99%

Multivariate Two-stage Adaptive-stacking Prediction of Regional Integrated Energy System

Ge,

Li,

Yan

et al. 2023

Journal of Modern Power Systems and Clean Energy

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To reduce environmental pollution and improve the efficiency of cascaded energy utilization, regional integrated energy system (RIES) has received extensive attention. An accurate multi-energy load prediction is significant for RIES as it enables stakeholders to make effective decisions for carbon peaking and carbon neutrality goals. To this end, this paper proposes a multivariate two-stage adaptive-stacking prediction (M2ASP) framework. First, a preprocessing module based on ensemble learning is proposed. The input data are preprocessed to provide a reliable database for M2ASP, and highly correlated input variables of multi-energy load prediction are determined. Then, the load prediction results of four predictors are adaptively combined in the first stage of M2ASP to enhance generalization ability. Predictor hyper-parameters and intermediate data sets of M2ASP are trained with a metaheuristic method named collaborative atomic chaotic search (CACS) to achieve the adaptive staking of M2ASP. Finally, a prediction correction of the peak load consumption period is conducted in the second stage of M2ASP. The case studies indicate that the proposed framework has higher prediction accuracy, generalization ability, and stability than other benchmark prediction models.

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“…With the rapid development and application of the field programmable gate array (FPGA) in recent years, it has been widely used in high-speed parallel acquisition and high-speed parallel processing [ 15 , 16 , 17 ]. However, this method also has some problems.…”

Section: Introductionmentioning

confidence: 99%

Resource-Saving Customizable Pipeline Network Architecture for Multi-Signal Processing in Edge Devices

Song

Qie

Hao

et al. 2022

Sensors

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With the development of the information age, the importance of edge computing has been highlighted in industrial site monitoring, health management, and fault diagnosis. Among them, the processing and computing of signals in edge scenarios is the cornerstone of realizing these scenarios. While the performance of edge devices has been dramatically improved, the demand for signal processing in the edge side has also ushered in explosive growth. However, the deployment of traditional serial or parallel signal processing architectures on edge devices has problems such as poor flexibility, low efficiency, and low resource utilization, making edge devices unable to exert their maximum performance. Therefore, this paper proposes a resource-saving customizable pipeline network architecture with a space-optimized resource allocation method and a coordinate addressing method for irregular topology. This architecture significantly improves the flexibility of multi-signal processing in edge devices, improves resource utilization, and further increases the performance potential of edge devices. Finally, we designed a comparative experiment to prove that the resource-saving and customizable pipeline network architecture can significantly reduce resource consumption under the premise of meeting real-time processing requirements.

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FPGA-Based Design for Online Computation of Multivariate Empirical Mode Decomposition

Cited by 12 publications

References 30 publications

Field‐programmable gate array‐based design for real‐time computation of ensemble empirical mode decomposition

Field‐programmable gate array‐based design for real‐time computation of ensemble empirical mode decomposition

Multivariate Two-stage Adaptive-stacking Prediction of Regional Integrated Energy System

Resource-Saving Customizable Pipeline Network Architecture for Multi-Signal Processing in Edge Devices

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