FPGA Based Architectures for H. 264/AVC Video Compression Standard

Agostini, Luciano; Bampi, Sérgio

doi:10.1109/fpl.2006.311361

2006 International Conference on Field Programmable Logic and Applications 2006

DOI: 10.1109/fpl.2006.311361

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FPGA Based Architectures for H. 264/AVC Video Compression Standard

Luciano Agostini

Sérgio Bampi

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2009

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Efficient Processing Technique for Unavailable Data in Hardware Implementation of Motion Estimator with Parallel Processing Architecture

Park¹,

Kang²

2009

The Journal of the Korea Contents Association

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In this paper, we propose the efficient processing technique for unavailable data in hardware implementation of motion estimator in H.264/AVC with parallel processing architecture. Motion estimation processing in the hardware is generally based on pipe-lining, some MV data of neighbor blocks are not available, whereas all MV data are valid in software processing where the data are sequentially processed. In this paper, we solve the problem of data being unavailable in MVp computation. To minimize the quality degradation caused by unavailable MVs, in the proposed method, the unavailable MV of a neighboring block is replaced with an integer pel unit MV, an MVp of neighboring blocks, or an MVcol (MV of co-located block).Comparing to the conventional method [7], our method outperformed maximally 0.832dB and 0.179dB for QCIF and CIF, respectively, in terms of BDPSNR.

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Efficient Processing Technique for Unavailable Data in Hardware Implementation of Motion Estimator with Parallel Processing Architecture

Park¹,

Kang²

2009

The Journal of the Korea Contents Association

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show abstract

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FPGA Based Architectures for H. 264/AVC Video Compression Standard

Cited by 1 publication

References 6 publications

Efficient Processing Technique for Unavailable Data in Hardware Implementation of Motion Estimator with Parallel Processing Architecture

Efficient Processing Technique for Unavailable Data in Hardware Implementation of Motion Estimator with Parallel Processing Architecture

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