FPGA based architecture for the computation of fourth-order cross moments

Qasim, Syed Manzoor; Khan, Altaf; Alshebeili, Saleh A.; Abbasi, Shuja A.

doi:10.1109/icias.2007.4658615

Cited by 4 publications

(7 citation statements)

References 9 publications

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“…In addition, the further research direction is threefold. As a first direction, it would be interesting to study the possibility of extending this approach to tri-matrix multiplication, widely used in DSP applications (ALshebeili, 2001), (Qasim et al, 2008), and even to matrix chain multiplications or matrix powers. In this work, we only deal with the basic matrix multiplication algorithm.…”

Section: Resultsmentioning

confidence: 99%

Code Size and Accuracy-aware Synthesis of Fixed-point Programs for Matrix Multiplication

Martel¹,

Najahi²,

Revy

2014

Proceedings of the 4th International Conference on Pervasive and Embedded Computing and Communication Systems

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In digital signal processing, many primitives boil down to a matrix multiplication. In order to enable savings in time, energy consumption, and on-chip area, these primitives are often implemented in fixed-point arithmetic. Various conflicting goals undermine the process of writing fixed-point codes, such as numerical accuracy, runtime latency, and size of the codes. In this article, we introduce a new methodology to automate the synthesis of small and accurate codes for matrix multiplication in fixed-point arithmetic. Our approach relies on a heuristic to merge matrix rows or columns in order to reduce the synthesized code size, while guaranteeing a target accuracy. We suggest a merging strategy based on finding closest pairs of vectors, which makes it possible to address in a few seconds problems such as the synthesis of small and accurate codes for size-64 and more matrix multiplication. Finally, we illustrate its efficiency on a set of benchmarks, and we show that it allows to reduce the synthesized code size by more than 50% while maintaining good numerical properties.

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Section: Resultsmentioning

confidence: 99%

Code Size and Accuracy-aware Synthesis of Fixed-point Programs for Matrix Multiplication

Martel¹,

Najahi²,

Revy

2014

Proceedings of the 4th International Conference on Pervasive and Embedded Computing and Communication Systems

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“…Unlike second‐order statistics, the HOS algorithm is based on higher‐order moment spectra in order to interpret and analyse the characteristics of a random process [7, 8].…”

Section: Higher‐order Statisticsmentioning

confidence: 99%

“…HOS consists of higher‐order moment spectra, which is defined for deterministic signals and cumulant spectra for random process [7]. Indeed, many real‐world applications are truly non‐Gaussian.…”

Section: Higher‐order Statisticsmentioning

confidence: 99%

“…A novel design based on the approach of a fourth‐order cross‐moment is proposed in this UWB radar. The fourth‐order cross‐moment

m_{4}

for a stationary random process

x false(n false)

with samples

x_{0} false(n false), x_{1} false(n false), x_{2} false(n false)

and

x_{3} false(n false)

is defined as [7]

m_{4} false(τ_{1}, τ_{2}, τ_{3} false) = E falsefalse{x_{0} false(n false) x_{1} false(n + τ_{1} false) x_{2} false(n + τ_{2} false) x_{3} false(n + τ_{3} false) falsefalse}

where

E falsefalse{* falsefalse}

denotes statistical expectation.…”

Section: Higher‐order Statisticsmentioning

confidence: 99%

“…For deterministic signal, it is replaced by a time summation over all time samples (for energy signals) or time averaging (for power signals). Under the assumption that

x false(n false)

is of zero mean, the fourth‐order cross‐moment is calculated from the given data as [7]

m_{4} false(τ_{1}, τ_{2}, τ_{3} false) = \frac{1}{N} {false\sum}_{n = 0}^{N} x_{0} false(n false) x_{1} false(n + τ_{1} false) x_{2} false(n + τ_{2} false) x_{3} false(n + τ_{3} false)

where N is the length of the signal.…”

Section: Higher‐order Statisticsmentioning

confidence: 99%

See 2 more Smart Citations

UWB radar recognition system based on HOS and SVMs

Sadli

Tatkeu

Hamidoun³

et al. 2018

IET Radar, Sonar & Navigation

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Application of FPGA in Process Tomography Systems

Hong¹,

Yunos²

2020

ENG

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This paper will provide some insights on the application of Field Programmable Gate Array (FPGA) in process tomography. The focus of this paper will be to investigate the performance of the technology with respect to various tomography systems and comparison to other similar technologies including the Application Specific Integrated Circuit (ASIC), Graphics Processing Unit (GPU) and the microcontroller. Fundamentally, the FPGA is primarily used in the Data Acquisition System (DAQ) due to its better performance and better trade-off as compared to competitor technologies. However, the drawback of using FPGA is that it is relatively more expensive.

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FPGA based architecture for the computation of fourth-order cross moments

Cited by 4 publications

References 9 publications

Code Size and Accuracy-aware Synthesis of Fixed-point Programs for Matrix Multiplication

Code Size and Accuracy-aware Synthesis of Fixed-point Programs for Matrix Multiplication

UWB radar recognition system based on HOS and SVMs

Application of FPGA in Process Tomography Systems

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