FPGA-Based Architecture for Computing Testors

Rojas, Alejandro J.; Cumplido, René; Carrasco-Ochoa, Jesús Ariel; Feregrino, Claudia; Martínez-Trinidad, José Fco.

doi:10.1007/978-3-540-77226-2_20

Cited by 6 publications

(3 citation statements)

References 3 publications

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“…Algorithms addressing the search of all TTs must run as faster as possible [18][19][20][21][22][23][24]. Various strategies have been developed to reach this goal, for example, the application of hardware and software-hardware configurations [25,26]. In addition, several algorithms have been proposed in order to compute only the minimum-length TTs [27,28], not the set of all TTs.…”

Section: Introductionmentioning

confidence: 99%

RoPM: An Algorithm for Computing Typical Testors Based on Recursive Reductions of the Basic Matrix

et al. 2021

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Feature selection plays an important role in pattern recognition and smart computing. The full set of typical testors constitutes a useful tool for solving feature selection problems, especially those problems in which the objects are described by both quantitative and qualitative features. However, finding the typical testors involves a high computational cost. That is why even the most efficient methods become unsuitable to solve some problems. In this work, a new algorithm was introduced in order to reduce the long runtimes involved in the search of typical testors. The performance of the proposed algorithm was evaluated by means of several tests, which use both real-world and simulation data. MATLAB and Java language on Eclipse SDK platform were used to build the simulation dataset and to perform the tests, respectively. The runtimes achieved by the proposed algorithm were significantly shorter than those obtained by fast-BR and GCreduct (the two fastest algorithms) mainly when the latter ones exhibited excessively long runtimes.

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Section: Introductionmentioning

confidence: 99%

RoPM: An Algorithm for Computing Typical Testors Based on Recursive Reductions of the Basic Matrix

et al. 2021

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“…13,14 ). These architectures are able to evaluate if a feature combination fulfills the testor or typical testor property in a single clock cycle, using an exhaustive algorithm, or the external-type algorithm BT.…”

Section: Algorithms For Computing Typical Testorsmentioning

confidence: 99%

“…Recently, implementations for feature-selection algorithms over FPGA-based embedded systems have been developed (Ref. 13,14 ).…”

Section: Introductionmentioning

confidence: 99%

A Fast Implementation for the Typical Testor Property Identification Based on an Accumulative Binary Tuple

Sánchez-Díaz¹,

Lazo-Cortés²,

Piza-Davila³

2012

IJCIS

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In this paper, we introduce a fast implementation of the CT EXT algorithm for testor property identification, that is based on an accumulative binary tuple. The fast implementation of the CT EXT algorithm (one of the fastest algorithms reported), is designed to generate all the typical testors from a training matrix, requiring a reduced number of operations. Experimental results using this fast implementation and the comparison with other state-of-the-art algorithms that generate typical testors are presented.

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A Fast Implementation of the CT_EXT Algorithm for the Testor Property Identification

Sánchez-Díaz

Piza-Davila

Lazo-Cortés

et al. 2010

Advances in Soft Computing

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Abstract. Typical testors are a useful tool for both feature selection and for determining feature relevance in supervised classication problems. Nowadays, generating all typical testors of a training matrix is computationally expensive; all reported algorithms have exponential complexity, depending mainly on the number of columns in the training matrix. For this reason, different approaches such as sequential and parallel algorithms, genetic algorithms and hardware implementations techniques have been developed. In this paper, we introduce a fast implementation of the algorithm CT EXT (which is one of the fastest algorithms reported) based on an accumulative binary tuple, developed for generating all typical testors of a training matrix. The accumulative binary tuple implemented in the CT EXT algorithm, is a useful way to simplifies the search of feature combinations which fulfill the testor property, because its implementation decreases the number of operations involved in the process of generating all typical testors. In addition, experimental results using the proposed fast implementation of the CT EXT algorithm and the comparison with other state of the art algorithms that generated typical testors are presented.

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FPGA-Based Architecture for Computing Testors

Cited by 6 publications

References 3 publications

RoPM: An Algorithm for Computing Typical Testors Based on Recursive Reductions of the Basic Matrix

RoPM: An Algorithm for Computing Typical Testors Based on Recursive Reductions of the Basic Matrix

A Fast Implementation for the Typical Testor Property Identification Based on an Accumulative Binary Tuple

A Fast Implementation of the CT_EXT Algorithm for the Testor Property Identification

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