2015 IEEE Power, Communication and Information Technology Conference (PCITC) 2015
DOI: 10.1109/pcitc.2015.7438064
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FPGA based all-on-chip DSTATCOM control for power quality improvement

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Cited by 2 publications
(4 citation statements)
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“…[4]. The verified results of [4] give that the system can compensate both the balanced as well as unbalanced loads. A practical design of hybrid APF is given in Unnikrishnan et al [5] which uses control mechanisms.…”
Section: B Filtersmentioning
confidence: 86%
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“…[4]. The verified results of [4] give that the system can compensate both the balanced as well as unbalanced loads. A practical design of hybrid APF is given in Unnikrishnan et al [5] which uses control mechanisms.…”
Section: B Filtersmentioning
confidence: 86%
“…The following Figure.2 gives the connection of APFs [13,14]. [4]. The verified results of [4] give that the system can compensate both the balanced as well as unbalanced loads.…”
Section: B Filtersmentioning
confidence: 93%
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“…Sandhya and Nagaraj [23] discuss the contribution to the study of power quality enhancement and various aspects of power quality and current trends. Sahu and Mahapatra [24] present all-on-chip-based distribution static synchronous compensator (DSTATCOM) control-based power quality improvement using virtex-5 field-programmable gate array (FPGA). The all-on-chip acts as a digital controller, including a conventional PI controller, low-ISSN: 2088-8694  pass filters, HCC, instantaneous power calculator, and sequence detector.…”
Section: Review On Related Researchmentioning
confidence: 99%