2013
DOI: 10.1016/j.sysarc.2013.01.004
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FPGA acceleration using high-level languages of a Monte-Carlo method for pricing complex options

Abstract: Esta es la versión de autor de la comunicación de congreso publicada en: This is an author produced version of a paper published in: AbstractIn this paper we present an FPGA implementation of a Monte-Carlo method for pricing Asian Options using Impulse C and floating-point arithmetic. In an Altera Stratix-V FPGA, a 149x speedup factor was obtained against an OpenMP-based solution in a 4-core Intel Core i7 processor. This speedup is comparable to that reported in the literature using a classic HDL-based method… Show more

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Cited by 2 publications
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References 33 publications
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