FPGA acceleration of a pseudorandom number generator based on chaotic iterations

Fang, Xiaole; Wang, Qianxue; Guyeux, Christophe; Bahi, Jacques M.

doi:10.1016/j.jisa.2014.02.003

Cited by 13 publications

(14 citation statements)

References 15 publications

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“…Practically, it can be seen as post processing treatment which adds chaos (as defined by Devaney) to the embedded PRNG [Guyeux and Bahi, 2010]. A first application of such an approach was presented in the PRNG framework, leading to the so-called chaotic iterations based pseudorandom number generators (CIPRNG, [Fang et al, 2014, Bahi et al, 2013). Since then, various improved versions have been proposed, one of them being designed specifically for FPGAs.…”

Section: Chaotic Prngsmentioning

confidence: 99%

“…This divide and conquer approach aims at ensuring hardware efficiency but is in conflict with statistical quality. Chaotic iterations [Bahi et al, 2013, Fang et al, 2014 can be used to achieve chaos objectives. However, the general formulation of the chaotic iterations [Bahi et al, 2015] should be preferred than the original one when efficiency is needed.…”

Section: General Ideamentioning

confidence: 99%

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One Random Jump and One Permutation: Sufficient Conditions to Chaotic, Statistically Faultless, and Large Throughput PRNG for FPGA

Bakiri¹,

Couchot

Guyeux

2017

Proceedings of the 14th International Joint Conference on E-Business and Telecommunications

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Sub-categories of mathematical topology, like the mathematical theory of chaos, offer interesting applications devoted to information security. In this research work, we have introduced a new chaos-based pseudorandom number generator implemented in FPGA, which is mainly based on the deletion of a Hamilton cycle within the n-cube (or on the vectorial negation), plus one single permutation. By doing so, we produce a kind of post-treatment on hardware pseudorandom generators, but the obtained generator has usually a better statistical profile than its input, while running at a similar speed. We tested 6 combinations of Boolean functions and strategies that all achieve to pass the most stringent TestU01 battery of tests. This generation can reach a throughput/latency ratio equal to 6.7 Gbps, being thus the second fastest FPGA generator that can pass TestU01.

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Section: Chaotic Prngsmentioning

confidence: 99%

Section: General Ideamentioning

confidence: 99%

One Random Jump and One Permutation: Sufficient Conditions to Chaotic, Statistically Faultless, and Large Throughput PRNG for FPGA

Bakiri¹,

Couchot

Guyeux

2017

Proceedings of the 14th International Joint Conference on E-Business and Telecommunications

Self Cite

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“…In the, 12 FPGA have been successfully used for realizing the speed requirement in chaotic pseudorandom sequence generation. [12][13][14][15] The rest of this paper is organized as follows: Section 2 gives a chaotic system, and Section 3 implementation of 3D chaotic system. 13 In Wang et al, 14 a proposed method that higher-dimensional digital chaotic system to encrypt the image will be realized the encryption algorithm on the FPGA.…”

Section: Introductionmentioning

confidence: 99%

“…The advantage of FPGA includes the designed time, the power consumption, the flexibility, and the cost. 13 In Wang et al, 14 a proposed method that higher-dimensional digital chaotic system to encrypt the image will be realized the encryption algorithm on the FPGA. There are three features in our encryption system.…”

Section: Introductionmentioning

confidence: 99%

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Secure color image encryption algorithm based on chaotic signals and its FPGA realization

Yang

Huang

2018

Circuit Theory & Apps

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In this paper, we designed a three-dimensional chaotic system (3D chaotic system). The continuous-time chaotic system had already been transformed into discrete-time (DT) chaotic system by Euler method. The phase portrait of DT chaotic system had been implemented on an oscilloscope via Altera field programmable gate array (FPGA) DE2-115. A cryptographic system of RGB image security for 3D chaotic system was proposed. There are three features in the encryption system. First, we use the information of plaintext image to produce the initial conditions of chaotic system. Second, the image of the permutation process shuffles the position of pixels in the plaintext image among RGB channels separately. Third, in the diffusion process, the pixels information in the shuffled image had been concealed by the XOR operation. The 3D chaotic encryption system had been also implemented on Altera DE2-115. Then, the cipher image can be obtained through the FPGA and simulated the image by Matlab code.In the security analysis, such as histogram analysis, correlation coefficient analysis, information entropy analysis, differential attack analysis (NPCR and UACI) have been performed in this paper. Experimental results show that the proposed algorithm has better security in comparison with other algorithms.

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Hybrid Random Number Generation Architecture for Mobile Registration Controller: A Reconfigurable Hardware Realization

Rethinam

Rajagopalan

Rayappan

et al. 2020

Wireless Pers Commun

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FPGA acceleration of a pseudorandom number generator based on chaotic iterations

Cited by 13 publications

References 15 publications

One Random Jump and One Permutation: Sufficient Conditions to Chaotic, Statistically Faultless, and Large Throughput PRNG for FPGA

One Random Jump and One Permutation: Sufficient Conditions to Chaotic, Statistically Faultless, and Large Throughput PRNG for FPGA

Secure color image encryption algorithm based on chaotic signals and its FPGA realization

Hybrid Random Number Generation Architecture for Mobile Registration Controller: A Reconfigurable Hardware Realization

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