Fourth-Arm Common-Mode Voltage Mitigation

Dagan, Kfir J.; Zuckerberger, A.; Rabinovici, R.

doi:10.1109/tpel.2015.2417804

Cited by 34 publications

(13 citation statements)

References 73 publications

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“…The first is the improvement of topology, and the second is the improvement of modulation strategy. For the former, the CMV can be reduced by several methods, such as the addition of the fourth bridge [7,8], the modification of the DC-link structure [9], the addition of the common-mode inductance [10] and the addition of the filter [11,12]. All the above methods impose extra hardware on the system, resulting in an increase in cost, volume and loss.…”

Section: Introductionmentioning

confidence: 99%

A Carrier-Based Discontinuous PWM Strategy of NPC Three-Level Inverter for Common-Mode Voltage and Switching Loss Reduction

Zhang

Zhou

et al. 2021

Electronics

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For the conventional carrier-based pulse width modulation (CBPWM) strategies of neutral point clamped (NPC) three-level inverters, the higher common-mode voltage (CMV) is a major drawback. However, with CMV suppression strategies, the switching loss is relatively high. In order to solve the above issue, a carrier-based discontinuous PWM (DPWM) strategy for NPC three-level inverter is proposed in this paper. Firstly, the reference voltage is modified by the twice injection of zero-sequence voltage. Switching states of the three-phase are clamped alternatively to reduce both the CMV and the switching loss. Secondly, the carriers are also modified by the phase opposite disposition of the upper and lower carriers. The extra switching at the border of two adjacent regions in the space vector diagram is reduced. Meanwhile, a neutral-point voltage (NPV) control method is also presented. The duty cycle of the switching state that affects the NPV is adjusted to obtain the balance control of the NPV. Still, the switching sequence in each carrier period remains the same. Finally, the feasibility and effectiveness of the proposed DPWM strategy are tested on a rapid control prototype platform based on RT-Lab.

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Section: Introductionmentioning

confidence: 99%

A Carrier-Based Discontinuous PWM Strategy of NPC Three-Level Inverter for Common-Mode Voltage and Switching Loss Reduction

Zhang

Zhou

et al. 2021

Electronics

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“…To address the abovementioned issues there are many potential solutions/methods given in the literature. Some of the solutions are as follows: (a) designing the PWM strategy to reduce the CMV [10]; (b) adding extra hardware circuitry for reducing the common mode or terminal voltage [11]; (c) using passive components to reduce CMV and resulting leakage current [9], [12] etc. These methods are very effective and are typically employed to mitigate CMV.…”

Section: Introductionmentioning

confidence: 99%

“…Most of the above-mentioned problems are collectively addressed by Dagan et al [11] and Arun et al [20] where the authors have addressed both CMV elimination and dc-bus utilization, apart from requirement of single dc-source. However, the given solutions use higher number of components when compared to number of SVs utilized.…”

Section: Introductionmentioning

confidence: 99%

An Improved T-type Switched-Capacitor Based 3-level 3-Phase Inverter with Common Mode Voltage Elimination and Voltage Boosting Capability

Hota¹,

Dhara²,

Sonti³

et al. 2021

Preprint

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<p>Zero common mode voltage (ZCMV) space vector modulation (SVM) strategy applied to a three-phase multilevel inverter (MLI) eliminates the common mode voltage (CMV). However, the usage of ZCMV-SVM strategy reduces the number of levels in the output voltage and requires higher magnitude dc voltage source due to the reduced modulation depth of the employed PWM scheme. Moreover, the usage of a single dc-source in such systems may have issues with respect to capacitor voltage balancing. Taking into account all the above issues, a 3-level inverter solution is proposed in this manuscript. The complete details of the method used for developing the proposed solution using the ZCMV space vectors is also included in this paper. The proposed topology utilizes a unique combination of a T-type 3-level inverter and a switched-capacitor (SC) circuit to achieve ZCMV performance with a single dc-source of low magnitude at a reduced component count. Analysis of the CMV and terminal voltages along with the design of the SCs are presented in this paper. The proposed topology is compared with the existing topologies to prove its unique merits over the other 3LI solutions with ZCMV capability. All the claims are validated using simulation and experimental results.</p>

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“…Numerous PWM approaches, for example, near state, active zero state, and remote states have been reported in literature to mitigate the CMV in VFDs. 15,16 Few attempts are reported by adding additional leg (fourth arm) to the CMV. 16 Conversely, the cost overall drive setup is inevitably increased.…”

Section: Introductionmentioning

confidence: 99%

“…15,16 Few attempts are reported by adding additional leg (fourth arm) to the CMV. 16 Conversely, the cost overall drive setup is inevitably increased. After the invention of three-level (3 L) diode-clamped (DC) multilevel inverters (MLIs), the industrial drives are developed using DC-MLIs, as it has a several advantages such as lower EMI, harmonics reduction, partial CMV removal ability, and so on.…”

Section: Introductionmentioning

confidence: 99%

A hybrid space vector modulation for the near‐zero common‐mode voltage and common‐mode current mitigation in diode‐clamped multilevel‐inverter‐fed induction motor drive

Selvaperumal

Kirubakaran

Bharatiraja

2020

Int Trans Electr Energ Syst

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Three-level diode-clamped (DC) multilevel inverters (MLIs) and its pulse width modulations (PWMs) are studied widely due to its extensive rewards in industrial drives. These modulation schemes are mainly concentrated to mitigate the zero common-mode (CM) voltage (CMV) and CM current (CMC). Unfortunately, although achieving near-zero CMV, these conventional methods are inadequate to maintain the DC-link low-frequency neutral point voltage oscillations. Hence, bulky DC-link capacitors are used in DC-MLIs. In this article, a full CM voltage eliminated the modified space vector modulation (SVM) method by combining the three medium switching vectors (M 3 V) with one zero vector and two medium switching vectors (M 2 ZV) is proposed. The hybridization of M 3 V + M 2 ZV uses the simple digital circuit to combine M 3 V and M 2 ZV, which creates near-zero CMV and CMC with an improved DC-link capacitor voltage balancing. The studies on the creation and effects of CMV and CMC are presented in detailed. Compared with the early reported full CMV elimination research works, the proposed method maintains the DC-link capacitors voltage balancing without compromising the complete elimination of the CMV. Depending on the reference vector modulation indices and DClink capacitor voltages, the proposed method uses the mixture of both the M 3 V and M 2 ZV switching states. The nominated switching vectors keep the CMV and CMC near to zero with capacitor voltage fluctuation with 1.8%. List of Symbols and Abbreviations: C b , bearing capacitance; C rs , rotor to stator frame parasitic capacitance; C wf , parasitic capacitive; C wr , parasitic capacitance between stator and rotor winding; C ws , parasitic capacitance in stator winding and frame; E SW , switching energy matrix; f o , fundamental frequency; f s , switching frequency; i b , bearing current; M a , modulations index; P sw , switching losses; S f , switching function; T s , switching time; V ao , V bo , and V co , inverter a, b, and c pole voltages; V b , bearing voltage; V C1 and V C2 , DC-link capacitors; V CM , common-mode voltage; V DC , DC-link

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Fourth-Arm Common-Mode Voltage Mitigation

Cited by 34 publications

References 73 publications

A Carrier-Based Discontinuous PWM Strategy of NPC Three-Level Inverter for Common-Mode Voltage and Switching Loss Reduction

A Carrier-Based Discontinuous PWM Strategy of NPC Three-Level Inverter for Common-Mode Voltage and Switching Loss Reduction

An Improved T-type Switched-Capacitor Based 3-level 3-Phase Inverter with Common Mode Voltage Elimination and Voltage Boosting Capability

A hybrid space vector modulation for the near‐zero common‐mode voltage and common‐mode current mitigation in diode‐clamped multilevel‐inverter‐fed induction motor drive

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