2001
DOI: 10.1063/1.1384906
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Formation mechanism of V defects in the InGaN/GaN multiple quantum wells grown on GaN layers with low threading dislocation density

Abstract: V-defect formation of the In x Ga 1Ϫx N/GaN multiple quantum wells ͑MQWs͒ grown on GaN layers with different threading dislocation ͑TD͒ densities was investigated. From cross-sectional transmission electron microscopy, we found that all V defects are not always connected with TDs at their bottom. By increasing the indium composition in the In x Ga 1Ϫx N well layer or decreasing the TD density of the thick GaN layer, many V defects are generated from the stacking mismatch boundaries induced by stacking faults w… Show more

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Cited by 162 publications
(87 citation statements)
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“…4b, which have inverted hexagonal pyramid-shaped { } 1011 side walls, 20 are generated from stacking faults (or threading dislocations) which are formed within the MQW (or from the GaN buffer layer) due to the strain relaxation as explained in the previous results. 21,22 In addition, these V-defects result in the different growth rate of the GaN barriers on the left and right side of V-defects according to the degree of the bending of InGaN well layers as shown in Fig. 4b.…”
Section: Resultsmentioning
confidence: 96%
“…4b, which have inverted hexagonal pyramid-shaped { } 1011 side walls, 20 are generated from stacking faults (or threading dislocations) which are formed within the MQW (or from the GaN buffer layer) due to the strain relaxation as explained in the previous results. 21,22 In addition, these V-defects result in the different growth rate of the GaN barriers on the left and right side of V-defects according to the degree of the bending of InGaN well layers as shown in Fig. 4b.…”
Section: Resultsmentioning
confidence: 96%
“…The surface roughness for 2 inch, 4 inch, 6 inch and 8 inch is in the range of 0.54-0.78 nm and pit density is about 3-6×10 8 /cm 2 across 5 μm×5 μm area. As we indicated in the XRD study, we have abrupt InGaN/GaN interface, the V-shape pits are responsible for the strain relaxation [9][10][11] due to large lattice mismatch. The PL peak wavelength map in Figure 8 illustrates that their PL uniformity is all around 2 nm in standard deviation except 8 inch wafer due to non optimized pocket design.…”
Section: Resultsmentioning
confidence: 99%
“…These stacking faults are formed within MQWs due to the strain relaxation, especially in MQWs with a high indium composition. 9 Liliental-Weber Ó The Author(s) 2007 suggested that rough surface areas such as islandisland coalescence fronts, the areas surrounding the intersection of a dislocation with the growth surface, and impurity clusters are all places where Vdefects can originate. 10 Northrup and Neugebauer performed calculations for a number of low-index indium-terminated GaN surfaces and showed that indium behaves as a differential surfactant, reducing the energy of the ð10 "…”
Section: Introductionmentioning
confidence: 99%