Formal Verification of UML Sequence Diagrams in the Embedded Systems Context

Cunha, Elizabeth Ferreira da; Custódio, Marcelo; Rocha, Herbert; Barreto, Raimundo

doi:10.1109/sbesc.2011.18

Cited by 12 publications

(8 citation statements)

References 7 publications

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“…Significant amount of work has been done on integrating graphical and formal specification techniques to support system development (see e.g., [5,11,13,27]). In particular, the combination UML with Petri Nets is discussed in [5]. The paper shows a method for translating UML sequence diagrams to Petri nets and verifying deadlock freeness, reachability, safety and liveness properties.…”

Section: Discussionmentioning

confidence: 99%

Towards Integrated Modelling of Dynamic Access Control with UML and Event-B

Vistbakka

Troubitsynå

2018

Electron. Proc. Theor. Comput. Sci.

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Role-Based Access Control (RBAC) is a popular authorization model used to manage data-access constraints in a wide range of systems. RBAC usually defines the static view on the access rights. However, to ensure dependability of a system, it is often necessary to model and verify statedependent access rights. Such a modelling allows us to explicitly define the dependencies between the system states and permissions to access and modify certain data. In this paper, we present a work-in-progress on combining graphical and formal modelling to specify and verify dynamic access control. The approach is illustrated by a case study -a reporting management system.

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Section: Discussionmentioning

confidence: 99%

Towards Integrated Modelling of Dynamic Access Control with UML and Event-B

Vistbakka

Troubitsynå

2018

Electron. Proc. Theor. Comput. Sci.

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“…This section discusses the use of the proposed transformation approach for an early stage system verification and identifying the appropriate system design by considering a real-time embedded sensor application. This embedded sensor application inspired from Cunha et al 37 originally described in Di Natale and Stankovic 38 detects and tracks objects in the environment. In Cunha et al, 37 the authors propose the translation of the UML SD model into the PN model and its analysis to verify different system properties such as deadlock freeness, reachability, safety, and liveness.…”

Section: Case Study and Evaluationmentioning

confidence: 99%

Transformation of sequence diagram to timed Petri net using Atlas Transformation Language metamodel approach

Shailesh

Nayak

Prasad

2021

J Software Evolu Process

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Real-time systems are complex and composed of time-bounded events that must satisfy the real-time constraints for their proper functioning. To cope with the complexity of real-time systems, model-driven approaches such as model-driven architecture (MDA) can be followed, which uses the conceptual models for system representation. This paper presents an MDA-based automated approach for an early stage performance evaluation and verification of a real-time system using the Unified Modeling Language (UML)/Modeling and Analysis of Real-Time and Embedded systems (MARTE) sequence diagram. A metamodel-based model-to-model transformation technique is used for mapping the UML/MARTE sequence diagram into the generalized Petri Net Markup Language (PNML) representation of the timed Petri net model using Atlas Transformation Language (ATL). The derived PNML representation has the advantage to support the interoperability between different Petri nettools when compared over the existing methods that produce tool-specific representation. The proposed approach enables the system designers to create and evaluate alternate system designs and predict their behavior, contributing to improving the system quality. The contribution of the proposed technique for identifying the optimal system design is analyzed using a real-time embedded sensor application. The proposed transformation approach is also validated using a real-time system from the manufacturing domain.

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“…For example, [6] defines and explains the relationship between sequence diagrams and normal Petri nets. Cunha et al [19] also translate UML sequence diagrams to Petri nets and verify deadlock freeness, reachability, safety and liveness properties by using a model checker. Soares et al [7] present an approach to automatically translate Sequence Diagrams to coloured Petri nets(CPN) ready for execution with CPN Tools.…”

Section: Related Workmentioning

confidence: 99%

Formally Verifying Sequence Diagrams for Safety Critical Systems

Chen

Mallet

Liu

2020

2020 International Symposium on Theoretical Aspects of Software Engineering (TASE)

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UML interactions, aka sequence diagrams, are frequently used by engineers to describe expected scenarios of good or bad behaviors of systems under design, as they provide allegedly a simple enough syntax to express a quite large variety of behaviors. This paper uses them to express formal safety requirements for safety critical systems in an incremental way, where the scenarios are progressively refined after checking the consistency of the requirements. As before, the semantics of these scenarios are expressed by transforming them into an intermediate semantic model amenable to formal verification. We rely on the Clock Constraint Specification Language (CCSL) as the intermediate semantic language. An SMT-based analysis tool called MyCCSL is used to check consistency of the sequence diagrams. We compare these requirements against actual execution traces to prove the validity of our transformation. In some sense, sequence diagrams and CCSL constraints both express a family of acceptable infinite traces that must include the behaviors given by the finite set of finite execution traces against which we validate. Finally, the whole process is illustrated on partial requirements for a railway transit system.

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Formal Verification of UML Sequence Diagrams in the Embedded Systems Context

Cited by 12 publications

References 7 publications

Towards Integrated Modelling of Dynamic Access Control with UML and Event-B

Towards Integrated Modelling of Dynamic Access Control with UML and Event-B

Transformation of sequence diagram to timed Petri net using Atlas Transformation Language metamodel approach

Formally Verifying Sequence Diagrams for Safety Critical Systems

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