Formal Methods for Synthesis

A foundation for formal reuse of hardware

“…Synthesis of hardware design has now been treated at the various levels of hardware description, from system down to logic level [20]. Formal methods have been employed to provide verification of hardware such as HOL Proof System [15] and Circal [21], but very little synthesis-related work has been developed [6].…”

Reusing hardware components with single-state processes

“…3 Actions that differ from X . 4 Act represents all existing actions and Sort 1i P comprises all the initial input actions of P. 5 Despite being called a kind of "bisimulation", f-bisimulation is not an equivalence relation (it is not symmetric). Simulation up to Function f-Bisimulation allowed us to find a total function to interface the specification with the existing process.…”

“…By contrast, reusable components might not fit a natural partitioning of the desired components; a library component could, for example, embed some functionality not required by the specification element and still be useful for reuse. Although formal methods have been employed to provide verification of hardware, such as HOL Proof System [12], Circal [14] and EPA [2,3], very little synthesisrelated work is developed [4].…”