Formal Methods for Reverse Engineering Gate-Level Netlists

Li, Wenchao

doi:10.21236/ada623698

Cited by 8 publications

(4 citation statements)

References 30 publications

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“…Li et al [34,36] tackle the reverse engineering problem by identifying interesting behavioral patterns in the observed logic. Their method employs temporal logic to formulate the behavioral pattern.…”

Section: Functional Analysismentioning

confidence: 99%

A survey of algorithmic methods in IC reverse engineering

et al. 2021

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The discipline of reverse engineering integrated circuits (ICs) is as old as the technology itself. It grew out of the need to analyze competitor's products and detect possible IP infringements. In recent years, the growing hardware Trojan threat motivated a fresh research interest in the topic. The process of IC reverse engineering comprises two steps: netlist extraction and specification discovery. While the process of netlist extraction is rather well understood and established techniques exist throughout the industry, specification discovery still presents researchers with a plurality of open questions. It therefore remains of particular interest to the scientific community. In this paper, we present a survey of the state of the art in IC reverse engineering while focusing on the specification discovery phase. Furthermore, we list noteworthy existing works on methods and algorithms in the area and discuss open challenges as well as unanswered questions. Therefore, we observe that the state of research on algorithmic methods for specification discovery suffers from the lack of a uniform evaluation approach. We point out the urgent need to develop common research infrastructure, benchmarks, and evaluation metrics. KeywordsHardware reverse engineering • Survey • Boolean function learning • Logical equivalence checking IntroductionReverse engineering of integrated circuits serves a multitude of purposes [32]. For example, understanding the details of a competitor's IC helps to conduct a competitive analysis. Furthermore, patent infringements can be detected by locating the stolen IP in a competitor's IC. In addition, a particularly growing topic in recent years is the detection of hardware B Leonid Azriel

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Section: Functional Analysismentioning

confidence: 99%

A survey of algorithmic methods in IC reverse engineering

et al. 2021

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“…4) Template Matching Attack: Template matching is a structural-based analysis attack that works in the manner of looking for recognizable patterns in the gate-level netlist [10]. Attackers aim to use this approach to reverse engineer a system, where a high-level description of the system is publicly available, and recognizable patterns in the gate-level netlist are identified.…”

Section: B Attacks On Obfuscationmentioning

confidence: 99%

Scalable Attack-Resistant Obfuscation of Logic Circuits

Alaql,

Bhunia

2020

Preprint

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“…al. [27,45] identified internal words based on bitslice aggregation (functional approach) and shapehashing (structural approach). The candidate words found were used as boundaries of operators for further recognition.…”

Section: Introductionmentioning

confidence: 99%

“…al. [29,27] identified functional operators in gate-level circuits, based on an existing library of blocks. Word-level information at the primary inputs was assumed available, but in many applications such information is not given.…”

Section: Introductionmentioning

confidence: 99%