Float-Zone Grown Silicon

Dietze, Wolfgang; Keller, Wolfgang; Mühlbauer, A.

doi:10.1007/978-3-642-68175-2_1

Cited by 14 publications

(3 citation statements)

References 31 publications

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“…The dominating techniques for growing silicon mono-crystals are since more than 50 years the Czochralski-process [1,2] and the floating-zone technique [1,3]. Since Dash [4] invented the necking process the Si mono-crystals can even be grown dislocation-free, nowadays up to diameters of 450 mm and a weight of more than 300 kg [1].…”

Section: Introductionmentioning

confidence: 99%

Mono-crystalline growth in directional solidification of silicon with different orientation and splitting of seed crystals

Trempa

Reimann

Friеdrich

et al. 2012

Journal of Crystal Growth

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Section: Introductionmentioning

confidence: 99%

Mono-crystalline growth in directional solidification of silicon with different orientation and splitting of seed crystals

Trempa

Reimann

Friеdrich

et al. 2012

Journal of Crystal Growth

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“…Czochralski (CZ) (bibliography in Rosenberger [3] and Zulehner [4]), and Float Zone (FZ) (bibliography in Dietze [5]).…”

mentioning

confidence: 99%

Silicon wafers for integrated circuit process

Leroy

1986

Rev. Phys. Appl. (Paris)

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2014 Le marché des circuits intégrés sera dominé pendant encore plusieurs années par des circuits réalisés sur des substrats de silicium. D'abord nous passons en revue comment les procédures de tirage du cristal impactent la qualité du silicium. Ensuite nous étudions comment les traitements thermiques affectent le comportement de l'oxygène et du carbone, et comment il en résulte une évolution de la qualité des tranches de silicium. En conclusion nous détaillons les exigences que les tranches doivent satisfaire à l'inspection de réception par l'utilisateur. Abstract. 2014 Silicon as a substrate material will continue to dominate the market of integrated circuits for many years. We first review how crystal pulling procedures impact the quality of silicon. We then investigate how thermal treatments affect the behaviour of oxygen and carbon, and how, as a result, the quality of silicon wafers evolves. Gettering techniques are then presented. We conclude by detailing the requirements that wafers must satisfy at the incoming inspection.

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“…During the widely used CZ semiconductor production process, highly irregular shaped polycrystalline silicon nuggets are packed into a large quartz crucible (see Figure 1) [7]. Each highly irregularly shaped nugget is unique, with weights ranging from a few grams to over 600 grams, see Figure 2.…”

Section: Introductionmentioning

confidence: 99%

Application of a model-free algorithm for the packing of irregular shaped objects in semiconductor manufacture

Sujan

Dubowsky²

Proceedings 2000 ICRA. Millennium Conference. IEEE International Conference on Robotics and Automation. Symposia Proceedings (C

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A Robotic System is being developed to automate the crucible packing process in the CZ semiconductor wafer production. It requires the delicate manipulation and packing of highly irregular shaped polycrystalline silicon nuggets, into a fragile glass crucible. Here an on-line algorithm is presented to plan the packing. It uses a method called Virtual Trial and Error. The on-line algorithm handles large numbersof highly irregularly shaped object of different sizes without requiring the object models. Working with the 3-D range maps of objects, it is computationally fast enough to be applied in real-time to practical industrial applications, such as the CZ wafer manufacture. Simulation results show that it compares well with the human performance. The integrated system is shown to achieve high production rates, required precision and cost effectiveness.

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Float-Zone Grown Silicon

Cited by 14 publications

References 31 publications

Mono-crystalline growth in directional solidification of silicon with different orientation and splitting of seed crystals

Mono-crystalline growth in directional solidification of silicon with different orientation and splitting of seed crystals

Silicon wafers for integrated circuit process

Application of a model-free algorithm for the packing of irregular shaped objects in semiconductor manufacture

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