FLIN: Enabling Fairness and Enhancing Performance in Modern NVMe Solid State Drives

Tavakkol, Arash; Sadrosadati, Mohammad; Ghose, Saugata; Kim, Jeremie S.; Luo, Yi; Wang, Yaohua; Ghiasi, Nika Mansouri; Orosa, Lois; Gómez-Luna, Juan; Mutlu, Onur

doi:10.1109/isca.2018.00041

Cited by 73 publications

(42 citation statements)

References 67 publications

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“…The FTL splits each request, varying in size from 512 bytes to several megabytes, into multiple sub-requests in logical page units. The FTL stripes the sub-requests to multiple flash memory chips for internal parallelism, and schedules sub-request processing at the chip level [15], [32], [42], [49]. In the data processing phase, the processing elements, such as embedded processors or accelerators, execute in-storage processing functions and then return the results to the host.…”

Section: B Description On Request Flow Of In-storage Processingmentioning

confidence: 99%

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Two-Stage In-Storage Processing and Scheduling for Pattern Matching Applications

et al. 2021

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In-storage processing technology allows applications to run on embedded processors and accelerators inside solid-state drives (SSDs) for efficient computing distribution. Especially, in pattern matching applications, in-storage computing can be processed quickly due to low data access latency, and the number of I/Os can be reduced by returning only a small amount of results to the host system after processing. Previously proposed in-storage processing is separated into three phases: command decoding, data access, and data processing. In this case, data processing is strictly isolated from data access, and the isolation constraints the utilization of storage. Merging data access and data processing among the phases can enhance the utilization of storage. To efficiently merge them, we propose two-stage in-storage processing architecture and scheduling, especially for the pattern matching application. The first stage processing during data access reduces the second stage processing latency. Also, leveraging the pattern matching results of the first stage processing, our scheduler prioritizes key requests that should return the results to the host system so that they are completed earlier than non-key requests. The proposed scheduling reduces the response time of in-storage processing requests by 52.6 % on average.INDEX TERMS in-storage processing, solid-state drives (SSDs), scheduling, pattern matching

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Section: B Description On Request Flow Of In-storage Processingmentioning

confidence: 99%

“…However, data access and processing are still separated, making in-storage processing less efficient. On the other hand, there have also been various studies on in-storage scheduling [15], [21], [36], [49], [58]. Most of them improve the overall throughput by leveraging the parallel processing of flash memory.…”

Section: Introductionmentioning

confidence: 99%

Two-Stage In-Storage Processing and Scheduling for Pattern Matching Applications

et al. 2021

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“…This work groups requests to I/O based on row-buffer locality and focuses on inter-application request scheduling. Tavakkol et al (2018) proposed a flash level interferenceaware scheduler as an I/O request scheduling mechanism. Its goal is to provide fairness among requests using a three stage scheduling algorithm mitigating issues causing interference such as differences in request access patterns, the ratio of reads to writes, garbage collection.…”

Section: Schedulingmentioning

confidence: 99%

On-Chip Dynamic Resource Management

Miele

Kanduri²,

Moazzemi³

et al. 2019

FNT in Electronic Design Automation

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The need for dynamic resource management has shadowed the exponential growth of on-chip transistor capacity, and the challenge is accentuated by the heterogeneity of resources, and the bewildering variety of constraints and requirements of applications, platforms and users. The field has started with a few research papers in the early 1990s but has grown today to over hundred yearly publications, leading to an accumulated body of literature presumable far above 1000 papers. We focus on the dynamic (run-time) management of onchip resources and mostly ignore design-time techniques and off-chip resources of larger electronic systems. Moreover, we do not attempt a complete review of all published work on the topic. Rather, this survey provides a structured review and discussion of the state of the art and is divided along the primary objectives of resource management techniques: performance, power, reliability and quality of service, each

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“…There are two primary ways to address this challenge: (i) Relying on device customization at hardware layer (e.g., Flash Translation Layer (FTL) or Open Channel) [1,[3][4][5][6][7][8][9], however, these solutions require special hardware supports and thus are hard to be applied to conventional SATA-based SSDs, which still dominate SSD market [10]. (ii) Relying on SSD-friendly I/O schedulers [11][12][13][14][15] which leverages SSD features (e.g.…”

Section: Introductionmentioning

confidence: 99%

“…While these schedulers are in large part successful, they mostly ignore I/O request queueing which is an important layer in SATA-based SSDs. I/O request queueing, such as native command queueing (NCQ) [16] in SATA and submission queue (SQ) [9] in NVMe, can be considered as the junction of operating system and storage device. They are adopted to fully exploit parallelism in SSDs.…”

Section: Introductionmentioning

confidence: 99%

NCQ-Aware I/O Scheduling for Conventional Solid State Drives

Fan

Ibrahim

et al. 2019

2019 IEEE International Parallel and Distributed Processing Symposium (IPDPS)

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While current fairness-driven I/O schedulers are successful in allocating equal time/resource share to concurrent workloads, they ignore the I/O request queueing or reordering in storage device layer, such as Native Command Queueing (NCQ). As a result, requests of different workloads cannot have an equal chance to enter NCQ (NCQ conflict) and fairness is violated. We address this issue by providing the first systematic empirical analysis on how NCQ affects I/O fairness and SSD utilization and accordingly proposing a NCQ-aware I/O scheduling scheme, NASS. The basic idea of NASS is to elaborately control the request dispatch of workloads to relieve NCQ conflict and improve NCQ utilization. NASS builds on two core components: an evaluation model to quantify important features of the workload, and a dispatch control algorithm to set the appropriate request dispatch of running workloads. We integrate NASS into four state-of-the-art I/O schedulers and evaluate its effectiveness using widely used benchmarks and real world applications. Results show that with NASS, I/O schedulers can achieve 11-23% better fairness and at the same time improve device utilization by 9-29%.

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FLIN: Enabling Fairness and Enhancing Performance in Modern NVMe Solid State Drives

Cited by 73 publications

References 67 publications

Two-Stage In-Storage Processing and Scheduling for Pattern Matching Applications

Two-Stage In-Storage Processing and Scheduling for Pattern Matching Applications

On-Chip Dynamic Resource Management

NCQ-Aware I/O Scheduling for Conventional Solid State Drives

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