Flexible Perovskite Solar Cells with Enhanced Performance Based on a Void-Free Imbedded Interface via a Thin Layer of Mesoporous TiO₂

Abstract

The interfacial contacts between the electron transport layer (ETL) and the perovskite film play a crucial role in high-performance perovskite solar cells (PSCs). Herein, we propose a method for depositing a low-temperature-processed mesoporous TiO 2 (mp-TiO 2 ) layer on the SnO 2 ETL (bl-SnO 2 ) with the flexible substrate to enhance the performance of the PSCs. This kind of mesoporous TiO 2 layer can both improve the interfacial contact without voids in the imbedded interface and enhance the mechanical stability in the interface between TiO 2 and perovskite. The upward growth of perovskite grains on the mesoporous TiO 2 layer leads to a uniform grain size and prevents voids at the ETL/perovskite interface. This excellent interfacial contact is the foundation for the collection and transportation of photogenerated electrons. As a result, the efficient PSCs achieve a power conversion efficiency (PCE) of 19.90% with the additional mp-TiO 2 layer on a flexible substrate. Furthermore, the unencapsulated flexible PSCs show enhanced storage stability and bending durability. This work paves the way for the fabrication of cost-effective and high-quality flexible PSCs with enhanced efficiency and mechanical stability.

π-Conjugated Polymer with Pendant Side Chains as a Dopant-Free Hole Transport Material for High-Performance Perovskite Solar Cells

“…As shown in the SEM image in Figure S8a, the perovskite layer showed good quality with a large grain size of 1370 nm and was pinhole-free. As we know, the large average grain size can effectively reduce defects and grain boundaries, which suppresses nonradiative combinations and improves device performance. , In addition, cross-sectional SEM confirmed that the perovskite showed good crystallinity with a thickness of 671 nm, and all layers of HTM, perovskite, and electron transport material contacted tightly (Figure S8b), which is favorable to enhancing the ability of charge extraction–transfer characteristics . Atomic force microscopy (AFM) was also used to check the film morphology of the pristine perovskite and perovskite/BDT-TA-BTASi on the FTO/TiO 2 substrates (Figure S8c,d).…”

Progress, challenges, and perspectives on polymer substrates for emerging flexible solar cells: A holistic panoramic review

“…Polymer substrate‐based flexible perovskite solar cells. Reproduced with permission from other studies 263–268 …”

“…Due to its flexibility, portability, low weight, and ease of integration over small, big, and curved surfaces, developing polymer substrate flexible PSCs technology can be seen as a viable and intriguing field from an application point of view in this situation. [263][264][265][266][267][268] characteristics as well as great flexibility and functional efficiency.…”

Interfacial Engineering of a PCBM/AZO Electron Transport Bilayer for Efficient and Stable Inverted Perovskite Solar Cells

“…The regular planar devices (n-i-p) have shown great promise with simple device configuration and demonstrated high-performing devices, but they have certain issues and problems such as high-temperature annealing and expensive organic materials. [2][3][4] These limitations prevent their usage in flexible and multi-junction architectures. [5] Contrarily, the p-i-n device design has certain advantages over their counterparts because charge-selective layers are relatively less absorptive with minimal J-V hysteresis, favorable for flexible substrate and low-temperature device fabrication and thus, can be employed as a top cell in siliconperovskite-tandem devices and for mass production.…”

“…Both p‐i‐n and n‐i‐p architectures have been applied to devise potential perovskite devices, where the perovskite active layer is considered to be an intrinsic “i” semiconductor layer, and “p” and “n” here stand for the hole (h + ) and electron (e − ) selective contact layer. The regular planar devices (n‐i‐p) have shown great promise with simple device configuration and demonstrated high‐performing devices, but they have certain issues and problems such as high‐temperature annealing and expensive organic materials [2–4] . These limitations prevent their usage in flexible and multi‐junction architectures [5] .…”