Flexible Nonvolatile Transistor Memory with Solution‐Processed Transition Metal Dichalcogenides

Abstract

Nonvolatile field-effect transistor (FET) memories containing transition metal dichalcogenide (TMD) nanosheets have been recently developed with great interest by utilizing some of the intriguing photoelectronic properties of TMDs. The TMD nanosheets are, however, employed as semiconducting channels in most of the memories, and only a few works address their function as floating gates. Here, a floating-gate organic-FET memory with an all-in-one floating-gate/tunneling layer of the solution-processed TMD nanosheets is demonstrated. Molybdenum disulfide (MoS ) is efficiently liquid-exfoliated by amine-terminated polystyrene with a controlled amount of MoS nanosheets in an all-in-one floating-gate/tunneling layer, allowing for systematic investigation of concentration-dependent charge-trapping and detrapping properties of MoS nanosheets. At an optimized condition, the nonvolatile memory exhibits memory performances with an ON/OFF ratio greater than 10 , a program/erase endurance cycle over 400 times, and data retention longer than 7 × 10 s. All-in-one floating-gate/tunneling layers containing molybdenum diselenide and tungsten disulfide are also developed. Furthermore, a mechanically-flexible TMD memory on a plastic substrate shows a performance comparable with that on a hard substrate, and the memory properties are rarely altered after outer-bending events over 500 times at the bending radius of 4.0 mm.

A Tunneling Dielectric Layer Free Floating Gate Nonvolatile Memory Employing Type‐I Core–Shell Quantum Dots as Discrete Charge‐Trapping/Tunneling Centers

“…Its round transfer characteristic (Figure S6a, Supporting Information) shows very small hysteresis in all sweep ranges. The memory window with ±130 V sweep range is only 9 V. It is widely acknowledged that the hysteresis of a transistor originates from the charge trapping–detrapping process in or around the conductive channel . The hysteresis of the none‐QD device can be ascribed to the unintentional damage to graphene during the transfer process, and the doping effect of PMMA on graphene .…”

“…Conventionally they are continuous films, which can realize the restriction of trapped charges in vertical direction, but are incapable of avoiding the lateral charge loss . To address this issue, nanofloating gate transistors have been developed, which employ nanomaterials such as organic nanoparticles, C 60 , 2D materials, or nanostructures of semiconductor and metal, as the floating gate. A charge‐tunneling dielectric layer is deposited upon the floating gate layer, to form discrete charge‐trapping centers dispersed in a dielectric matrix.…”

Recent Advances of Flexible Data Storage Devices Based on Organic Nanoscaled Materials

“…2D materials, especially graphene and MoS 2 is considered to be promising alternatives for traditional semiconductors due to their easy solution processing techniques, excellent physical and chemical properties, 3D stacking capability, and low cost . An OFETM with liquid‐exfoliated transition metal dichalcogenide (TMD) nanosheets (MoS 2 ) as both floating‐gate and tunneling materials was fabricated by Kim et al The memory device showed a large current on/off ratio (10 4 ), long data retention time (7 × 10 3 ), and good endurance property (400 cycles). A variety of liquid‐exfoliated TMD nanosheets, such as MoSe 2 and WS 2 were incorporating into polymer matrix to obtain further optimized memories.…”

Functional Non‐Volatile Memory Devices: From Fundamentals to Photo‐Tunable Properties

“…d) Schematic energy band diagrams at negative bias and positive bias. Reproduced with permission . Copyright 2017, Wiley‐VCH.…”

“…Using 200 nm SiO 2 as blocking dielectric, the device showed memory window of about 40 V, on/off ratio reaching 10 4 , excellent P/E endurance and retention ability. Liquid‐exfoliated transition metal dichalcogenide (TMD) nanosheets (MoS 2 ) was used by Kim et al as floating‐gate and PMMA was acted as the blocking dielectric (Figure c,d). The memory showed an on/off ratio of 10 4 , retention characteristics up to 7 × 10 3 s and more than 400 program/erase cycles.…”