Flexible and scalable methodology for testing high-speed source synchronous interfaces on automated test equipment (ATE) with multiple fixed phase capture and compare

Laquai, B.; Braun, Michael; Walther, Simone; Schulze, G.

doi:10.1049/iet-cdt:20060133

Cited by 4 publications

(1 citation statement)

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“…Since ATE has no source synchronous function, special architectures have been developed to test memory systems with a source synchronous interface [5], [6]. Accordingly, implementations of phase alignment and datastrobe scanning functions on ATE for testing memory interface timing increase test cost.…”

Section: Introductionmentioning

confidence: 99%

A Built-In Self-Test scheme for DDR memory output timing test and measurement

Kim

Abraham

2012

2012 IEEE 30th VLSI Test Symposium (VTS)

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This paper presents a Built-In Self-Test (BIST) scheme to measure high speed double data rate (DDR) memory output timing using low cost testers. This technique uses an onchip pattern generator to generate a time delay between data and data-strobe or clock. The time delay is controlled precisely using a phase interpolator based cycle-by-cycle control method. A novel method for testing the resolution of phase interpolator, which does not need any extra hardware, is also presented. Using the test resolution, a timing pass/fail flag is set and the timing margin is quantified as a multiple of the test clock cycle. Since these test results have high observability, output per-pin timing performance can be diagnosed easily, which is especially good for testing parallel memory interfaces. Moreover, these features make our scheme compatible with low-cost testers and decreases the time-to-market for the chip. The BIST circuit has been implemented using the 0.18-µm CMOS process, and chip measurement results are presented. We obtained a test resolution of 10 ps for testing output timing. Using the fabricated test chip, this paper shows the effects of switching noise, per-pin skews and slew-rate change on output timing variations.

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Section: Introductionmentioning

confidence: 99%