System-on-Chip Test Architectures 2008
DOI: 10.1016/b978-012373973-5.50017-6
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Field Programmable Gate Array Testing

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“…Such a TC configures the FPGA in a way that a part of the structures or the function of the structures is controllable and observable so that appropriate test stimuli can be applied to test for faults. The number of required TCs may range from a few up to a few hundreds if programmable interconnect structures are completely included [9].…”
Section: State Of the Art Fpga Testmentioning
confidence: 99%
“…Such a TC configures the FPGA in a way that a part of the structures or the function of the structures is controllable and observable so that appropriate test stimuli can be applied to test for faults. The number of required TCs may range from a few up to a few hundreds if programmable interconnect structures are completely included [9].…”
Section: State Of the Art Fpga Testmentioning
confidence: 99%