Ferroelectric Devices for Neuromorphic Computing

Abstract

Neuromorphic computing inspired by the neural network systems of the human brain enables energy efficient computing for big-data processing. A neural network is formed by thousands or even millions of neurons which are connected by even a higher number of synapses. Neurons communicate with each other through the connected synapses. The main responsibility of synapses is to transfer information from the pre-synaptic to the postsynaptic neurons. Synapses can memorize and process the information simultaneously. The plasticity of a synapse to strengthen or weaken their activity over time make it capable of learning and computing. Thus, artificial synapses which can emulate functionalities and the plasticity of bio-synapses form the backbones of neuromorphic computing. Alternative artificial synapses have been successfully demonstrated. The classical two-terminal memristor devices, like resistive random access memory (ReRAM), phase change memory (PCM) and ferroelectric tunnel junctions (FTJs) with one terminal connected to the pre-synaptic neuron and another connected with the post-synaptic neuron, own advantages of simple structure, easy processing with high density, and capability of integration with CMOS. However, signal processing and learning cannot be performed simultaneously in 2-terminal devices, thus limiting their synaptic functionalities. Ferroelectric field effect transistors (FeFET) which uses ferroelectric as the gate oxide are the most interesting three-terminal artificial synapse devices, in which the gate or the source is connected to the pre-synaptic neuron while the drain is used for the terminal of the post-synaptic neuron , thus can perform signal transmission and learning simultaneously. However, traps at the channel interface can degrade the device performance causing low endurance. Focuses of those abovementioned devices have been mainly put on the homosynaptic plasticity, which is input specific, meaning that the plasticity occurs only at the synapse with a pre-synaptic activation . The homosynaptic plasticity has a drawback of positive feedback loop: when a synapse is potentiated, the probability of the synapse to be further potentiated is increased. Similarly, when a synapse is depressed the probability of the synapse of being further depressed is higher. Therefore, synaptic weights tend to be either strengthened to the maximum value or weakened to zero, causing the system to be unstable. In contrast, heterosynaptic plasticity can be induced at any synapse at the same time after episodes of strong postsynaptic activity, avoiding the positive feedback problem and stabilize the activity of the post-synaptic neuron. To address the above challenges we proposed a very simple 4-terminal synapse structure based on gated Schottky diodes on silicon (FEMOD) with a ferroelectric layer. The conductance of the Schottky diode is modulated by the polarization of the ferroelectric layer. With this simple synapse structure we can achieve multiple hetero-synaptic functions, including excitatory/ inhibitory post-synaptic current (EPSC/IPSC), paired-pulse facilitation/depression (PPF/PPD), long-term potentiation/depression (LTP/LTD), as well as biological neuron-like spike-timing-dependent plasticity (STDP) characteristics. The modulatory synapse can modify the weight of another synapse with a very low voltage. Furthermore, logic gates, like AND and NAND which are highly desired for in-memory computing can be realized with such simple structure. Figure 1