FELIX-Based Readout of the Single-Phase ProtoDUNE Detector

Borga, A.; Church, E.; Filthaut, F.; Gamberini, E.; Jong, P. de; Miotto, G. Lehmann; Schreuder, F.; Schumacher, Jörn; Sipos, Roland; Vermeulen, M. A.; Wierman, K.; Wood, L.

doi:10.1109/tns.2019.2904660

Cited by 10 publications

(7 citation statements)

References 12 publications

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“…The 200 cells of the first DUNE FD module will be read out in parallel, by 75 "upstream DAQ" readout units. Each unit makes use of a Front-End LInk eXchange (FELIX) PCIe 3.0 card [16,26] holding a Xilinx Virtex-7 UltraScale+ FPGA to read out digitized waveforms, and pre-process the data. In the nominal DUNE readout unit design, the FPGA processes continuous waveforms in order to perform noise filtering and hit-finding; hit-finding summaries are then sent for additional processing to a FELIX-host CPU system, in order to form trigger candidates (interaction candidates); the latter inform a subsequent module-wide trigger decision.…”

Section: Application Case: Real-time Data Selection For the Future Du...mentioning

confidence: 99%

Real-time Inference with 2D Convolutional Neural Networks on Field Programmable Gate Arrays for High-rate Particle Imaging Detectors

Jwa¹,

Guglielmo²,

Arnold³

et al. 2022

Preprint

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We present a custom implementation of a 2D Convolutional Neural Network (CNN) as a viable application for real-time data selection in high-resolution and high-rate particle imaging detectors, making use of hardware acceleration in high-end Field Programmable Gate Arrays (FPGAs). To meet FPGA resource constraints, a two-layer CNN is optimized for accuracy and latency with KerasTuner, and network quantization is further used to minimize the computing resource utilization of the network. We use "High Level Synthesis for Machine Learning" (hls4ml) tools to test CNN deployment on a Xilinx UltraScale+ FPGA, which is a proposed FPGA technology for the front-end readout system of the future Deep Underground Neutrino Experiment (DUNE) far detector. We evaluate network accuracy and estimate latency and hardware resource usage, and comment on the feasibility of applying CNNs for real-time data selection within the proposed DUNE data acquisition system.

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Section: Application Case: Real-time Data Selection For the Future Du...mentioning

confidence: 99%

Real-time Inference with 2D Convolutional Neural Networks on Field Programmable Gate Arrays for High-rate Particle Imaging Detectors

Jwa¹,

Guglielmo²,

Arnold³

et al. 2022

Preprint

View full text Add to dashboard Cite

show abstract

“…The 200 cells of the first DUNE FD module will be read out in parallel, by 75 “upstream DAQ” readout units. Each unit makes use of a Front-End LInk eXchange (FELIX) PCIe 3.0 card (Borga et al, 2019 ; Abi et al, 2020d ) holding a Xilinx UltraScale+ FPGA to read out digitized waveforms, and pre-process the data. In the nominal DUNE readout unit design, the FPGA processes continuous waveforms in order to perform noise filtering and hit-finding; hit-finding summaries are then sent for additional processing to a FELIX-host CPU system, in order to form trigger candidates (particle interaction candidates); the latter inform a subsequent module-wide trigger decision.…”

Section: Application Case: Real-time Data Selection For the Future Du...mentioning

confidence: 99%

Real-Time Inference With 2D Convolutional Neural Networks on Field Programmable Gate Arrays for High-Rate Particle Imaging Detectors

Jwa

Guglielmo

Arnold

et al. 2022

Front. Artif. Intell.

View full text Add to dashboard Cite

We present a custom implementation of a 2D Convolutional Neural Network (CNN) as a viable application for real-time data selection in high-resolution and high-rate particle imaging detectors, making use of hardware acceleration in high-end Field Programmable Gate Arrays (FPGAs). To meet FPGA resource constraints, a two-layer CNN is optimized for accuracy and latency with KerasTuner, and network quantization is further used to minimize the computing resource utilization of the network. We use “High Level Synthesis for Machine Learning” (hls4ml) tools to test CNN deployment on a Xilinx UltraScale+ FPGA, which is an FPGA technology proposed for use in the front-end readout system of the future Deep Underground Neutrino Experiment (DUNE) particle detector. We evaluate network accuracy and estimate latency and hardware resource usage, and comment on the feasibility of applying CNNs for real-time data selection within the currently planned DUNE data acquisition system. This represents the first-ever exploration of employing 2D CNNs on FPGAs for DUNE.

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“…ments [2][3][4] began to improve the bandwidth of DAQ by developing 10 Gbps ethernet 53 in FPGA. [5] implemented a 1G/10G ethernet hub firmware for processing multi-ports gigabit data and improving bandwidth.…”

Section: Jinst 16 P07044mentioning

confidence: 99%

A study of UDP and TCP FPGA implementation for data acquisition system

Zhang

Wang

et al. 2021

J. Inst.

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Two main protocol stacks for gigabit ethernet are currently widely adopted in the data acquisition system for high energy physics experiments. The first method is based on User Datagram Protocol (UDP), which transfer packets before an agreement is provided by the receiving party. However, the second method, called Transmission Control Protocol (TCP), establishes a connection through a process of the three-way handshake. We designed two FPGA projects, based on UDP and TCP respectively, on such a real application as ethernet communication module for ALICE calorimeters. The test of both projects is carried out on the same Xilinx Virtex-6 FPGA board, and data is captured through a professional network protocol analyzer. We analyzed the implementation methods and complexity, the variation patterns of data throughput, and the resource utilization of the two designs. The findings obtained under the same application scenario and test platform not only reveals the variation rule of actual data throughput, but also proved that the TCP would require twice as much FPGA resource for implementation as the UDP.

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FELIX-Based Readout of the Single-Phase ProtoDUNE Detector

Cited by 10 publications

References 12 publications

Real-time Inference with 2D Convolutional Neural Networks on Field Programmable Gate Arrays for High-rate Particle Imaging Detectors

Real-time Inference with 2D Convolutional Neural Networks on Field Programmable Gate Arrays for High-rate Particle Imaging Detectors

Real-Time Inference With 2D Convolutional Neural Networks on Field Programmable Gate Arrays for High-Rate Particle Imaging Detectors

A study of UDP and TCP FPGA implementation for data acquisition system

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