Euromicro Symposium on Digital System Design, 2003. Proceedings. 2003
DOI: 10.1109/dsd.2003.1231982
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FC-Min: a fast multi-output Boolean minimizer

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Cited by 11 publications
(8 citation statements)
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“…After that, the implicants should be yet expanded in order to reduce the total number of literals. Description of this process exceeds the scope of this paper, for more information see [11].…”
Section: Principles Of Fc-minmentioning
confidence: 99%
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“…After that, the implicants should be yet expanded in order to reduce the total number of literals. Description of this process exceeds the scope of this paper, for more information see [11].…”
Section: Principles Of Fc-minmentioning
confidence: 99%
“…This process will be denoted as an Implicant Generation phase. For more detailed description see [11].…”
Section: Incremental Implicant Generationmentioning
confidence: 99%
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“…The requirement of efficient multiple input logic synthesis in different fields like automatic control system design, many areas of FPGA design flow [2][3][4], VLSI synthesis [5], the design of BIST, feature reduction [6] and biological logic circuits designing [7]. It is possible to design the same functional combinational circuit with various design styles.…”
Section: Introductionmentioning
confidence: 99%